Tensilica introduced the ConnX BBE64-128 and BBE64-UE DSP (digital signal processor) IP (intellectual property) cores for SOC (system-on-chip) design. The ConnX BBE64-128 IP core features 100+ GigaMACs performance in 28nm high-performance process technology. The ConnX BBE64-UE is optimized for the low power and small area requirements of LTE Advanced handsets. An evaluation kit for the ConnX BBE64-128 and ConnX BBE64-UE cores is expected to be available in the fall of 2011.
Tensilica announced the Xtensa LX3 high-performance dataplane processor (DPU) core. The Xtensa LX3 DPU is optimized for digital signal processing (DSP) and control in the system-on-chip (SOC) dataplane. The Xtensa LX3 DPU offers a wide range of pre-verified DSP options ranging from a simple floating point accelerator to a 16-MAC (multiply accumulator) vector DSP powerhouse. The Xtensa LX3 customizable DPU is available now.
Tata Elxsi’s RoS-ES (Real Time Operating System for Embedded Systems) operating system is now available for Tensilica’s Xtensa customizable dataplane processors (DPUs) and Diamond Standard processors. Tensilica’s processor cores are efficient and, when paired with our RoS-ES RTOS, they become effective SOC controllers. Tata Elxsi’s RoS-ES is a compact real-time operating system (RTOS) that provides an array of capabilities. Roses Embedded Operating System is ideal for networking and consumer electronics applications.