Ambarella introduced the A7 IP Camera SoC for video surveillance applications. The Ambarella A7 features an ARM CPU, multi-streaming 1080p60 H.264 encoder, up to 500 MHz pixel capture rate (equivalent to 8 Megapixels at 60 frames per second), and power consumption of less than 1.5 Watts. The chip’s 3D motion compensated noise reduction eliminates the motion smearing and ghosting artifacts that are commonly associated with motion adaptive 3D filtering. The Ambarella A7 IP Camera SoC is sampling now.
MIPS Technologies announced the MIPS32 1074K Coherent Processing System (CPS). The new processor is a fully-synthesizable multicore IP that approaches production frequencies of 1.5 GHz in 40nm G process. The MIPS 1074K CPS will be available in October 2010. Two initial versions of the 1074K CPS will be available: the MIPS32 1074Kc CPS, which provides a coherent processing system using base integer cores, and the MIPS32 1074Kf CPS, which includes a floating point unit (FPU) in each core.
Novelics introduced the coolSRAM-6T embedded memory IP and MemQuest compiler, which are enhanced with Novelics 3G optimizations. The coolSRAM-6T IP is implemented in bulk logic CMOS technology, requiring no additional manufacturing costs. The coolSRAM-6T enables ASSP and ASIC designers to achieve higher performance and more power-efficient system-on-chips (SoCs). The SRAM-6T in 40nm is available for licensing now. The initial offering is offered in TSMC’s 40nm GP / LP technologies. Support for UMC, GF, and SMIC will also be offered.
Texas Instruments Incorporated (TI) announced the DMVA1 SoC. With DMVA1, engineers can deploy smart analytics functions such as people counting, trip zone, intelligent motion detection, camera tamper detection and streaming metadata. By coupling the vision co-processor with smart analytics all on a single chip, designers can reduce the cost of video analytics-enabled IP cameras by an order of magnitude. The DMVA1 video security camera SoC will begin sampling in the second quarter to early adopter video security customers.
Ambarella introduced the A5s Media Processor for the IP camera and video surveillance. The A5s features HD H.264 multi-streaming, excellent image quality, a flexible ARM11 CPU, and low power. The A5s family is currently shipping, with models targeting IP cameras from SD to HD and beyond. The A5s IP Camera Reference Platform with SDK is available for qualified partners. IP cameras based on Media Processor are expected to be priced below US $150.
Virage Logic introduced the ARC 601 32-bit microprocessor core. The ARC 601 runs at 532MHz (1.2 DMIPS/MHz) and consumes only 13 µW/MHz in 65-nanometer (nm) process technology. The IP core is only 0.039 mm2 in size and will fit 2.5 times into the size of the dot (12 point font) at the end of a sentence. The processor is available now and has already been licensed to several of Virage Logic’s lead customers. The core is targeted at audio, imaging, portable, storage, consumer, wireless, and security applications.
Texas Instruments (TI) unvieled the DM368IPNC-MT5 Internet Protocol (IP) camera reference design. The DM368IPNC-MT5 camera reference design provides low power, high definition (HD) video processing for video surveillance applications. The DM368IPNC-MT5 IP camera reference design with H.264 main profile 1080p at 30 frames per second (fps) offers compression in a full HD solution, with the complete camera utilizing only three Watts. The IP camera reference design is based on a new DaVinci video processor. The DM368IPNC-MT5 IP camera reference design is available for USD $995.