Tag Archives: ASSP

Novelics coolSRAM-6T Embedded Memory IP and MemQuest Compiler

Novelics introduced the coolSRAM-6T embedded memory IP and MemQuest compiler, which are enhanced with Novelics 3G optimizations. The coolSRAM-6T IP is implemented in bulk logic CMOS technology, requiring no additional manufacturing costs. The coolSRAM-6T enables ASSP and ASIC designers to achieve higher performance and more power-efficient system-on-chips (SoCs). The SRAM-6T in 40nm is available for licensing now. The initial offering is offered in TSMC’s 40nm GP / LP technologies. Support for UMC, GF, and SMIC will also be offered.

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