The VTOC® 4.0 Toolset, from ARC International (LSE: ARK), creates 100% cycle accurate C++ and SystemC models from Verilog and VHDL RTL. VTOC 4.0 includes a new intelligent code analysis system that enables developers to generate C++ and SystemC models that are more efficient and achieve higher performance. The source code models accelerate the development of performance critical firmware such as device drivers and codecs and functional verification of this software within a complete SoC; a complete software suite can be developed and debugged before the target SoC sees first silicon. ARC IP eXchange, based on VTOC technology, enables IP vendors, semiconductor, and fabless companies to securely deliver C++ and SystemC models to software developers, partners and customers.
Carbon Model Studio, from Carbon Design Systems, is a solution for the automatic generation, validation, and implementation of hardware-accurate software models, enabling a design team to begin software development and debug before silicon. Carbon Model Studio was designed for the entire design team, from system architects and software engineers to hardware designers and third-party intellectual property (IP) providers. System architects can use Carbon Model Studio for architectural analysis and profiling. Software engineers can develop and debug embedded software, firmware, drivers and diagnostics concurrent with hardware development. In addition, Carbon Models can be securely distributed to third-party partners to accelerate adoption of an IP provider’s technology devices.
The MathWorks SimEvents(R) 2 supports the modeling of complex discrete-event and hybrid dynamic systems across the Simulink(R) family of products. SimEvents is a discrete-event, transaction-level simulator that models system functions and constraints with a network of queues, servers, gates, and switches. Engineers can develop applications for packet-based communications, supervisory control, computer architecture, mission planning, manufacturing, logistics, and other areas.
Opal-RT eDRIVEsim is a real-time platform for designing advanced control systems and performing HIL testing of controllers used in high-speed electric motors, power converters, and hybrid drives. eDRIVEsim’s software is based upon Opal RT’s RT-LAB real-time technology for model-based designs. RT-LAB’s flexibility and scalability allow it to be used in virtually any simulation or control system application, and to add computing-power where and when it is needed.
Avionic, railway, and high-end automotive systems have become too complex to develop and coordinate without the assistance of a design environment that connects all of the developers through their participation in the execution of the engineering process. The more efficient solution in this case is to use a model-based design tool. The adoption of Model-Based Design brings several benefits such as:
Agilent Technologies Inc. (NYSE:A) Momentum GX is a planar 3D electromagnetic (EM) simulator designed to significantly expand the accuracy and range of passive circuit libraries, including parasitic models and entire circuits. Fully integrated with the Genesys EDA platform (previously known as Eagleware-Elanix Genesys), the Agilent Momentum GX enables RF and microwave designers to reduce design steps and speed the design and verification process for complex RF and microwave passive circuit designs.
FineSim(R) Pro Parallel Manager, by Magma(R) Design Automation Inc. (Nasdaq: LAVA), is the first parallel fast-SPICE simulation capability available to the semiconductor industry. Built on Magma’s proprietary Native Parallel Technology(TM), the parallel fast-SPICE option to FineSim Pro makes it possible for the verification of very large, complex mixed-signal systems on chip (SoCs).
Aldec’s Riviera 2007.02 is a 64-bit mixed-language design simulation environment for VHDL, Verilog, SystemVerilog, and SystemC designs. Riviera delivers proven simulation performance and accuracy for all multi-million gate HDL designs. Riviera, running in a true 64-bit mode, leverages the hardware to perform large simulation runs requiring 16 gigabytes of memory.
To further reinforce a designer’s control over the quality and speed of design verification, Riviera 2007.02 includes performance optimization for RTL and gate level simulation (1.5-2x speed improvements over the previous release), VHDL and Verilog expression coverage, mixed PSL assertion with VHDL and Verilog design blocks support, and graphical debugging tools designed specifically for large IC designs.
More info: Riviera 2007.02
The RadiSys Multicore Development Kit, which includes RadiSys’ OS-9 real-time operating system and real-time virtualization software from VirtualLogix, provides embedded systems designers with the software tools and real-time operating systems they need to develop innovative multicore-based designs on RadiSys Procelerant(TM) ComExpess solutions, embedded servers and motherboards.
The RadiSys Multicore Development Kit runs on Intel(R) Core(TM) 2 Duo processors, which are well suited for numerous applications including networking equipment, interactive clients (i.e., point-of-sale terminals and ATMs), gaming platforms, industrial control and automation, digital security surveillance, and medical imaging.
More info: RadiSys
EVE’s ZeBu-XXL is an emulation and rapid prototyping system for hardware debugging and embedded software validation. ZeBu-XXL is the latest addition to EVE’s cost-effective ZeBu (for Zero Bugs) family. Architected with the largest field programmable gate arrays (FPGAs) and housed in a cabinet half the size of the previous ZeBu-XL generation, ZeBu-XXL verifies designs at three times the speed of the ZeBu-XL, providing twice the capacity in a single chassis.