'FPGA' Category Archive

Xilinx ISE WebPACK 9.1i

Posted by Ken Cheung in FPGA on Monday, March 19, 2007

Xilinx’s Integrated Software Environment (ISE(TM)) WebPACK(TM) 9.1i is the latest version of the company’s free downloadable programmable logic design suite. The new version includes all the features of the 9.1i release of the popular Xilinx ISE Foundation(TM) software with full support for optional embedded, digital signal processing (DSP) and real-time debug design flows. Most notably, [...]

Aldec Active-HDL Lattice Designer Edition Lite

Posted by Ken Cheung in FPGA on Tuesday, February 13, 2007

The Aldec Active-HDL Lattice Designer Edition Lite is a FPGA design tool. It supports mixed VHDL and Verilog simulation for Lattice’s leading FPGA devices, including the 90nm Extreme Performance(TM) LatticeSC(TM) family as well as the 90nm LatticeECP2M(TM) family, which is the industry’s only low-cost FPGA family with unequaled on-chip memory capacity and 3.125 Gbps SERDES [...]

Atmel ATF15xxBE 1.8V CPLDs

Posted by Ken Cheung in FPGA on Wednesday, January 3, 2007

The Atmel ATF15xxBE family of ROHS-compliant, 1.8V CPLDs feature standby power consumption of just 5 uA — over 60% less power drain than the nearest competing CPLD. Operating power consumption is 1 mA at 20 MHz or less. Available in densities ranging from 32 to 128 macrocells, ATF15xxBE CPLDs can be used to implement system [...]

Xilinx Spartan-3A FPGAs

Posted by Ken Cheung in FPGA on Monday, December 11, 2006

The Xilinx Spartan(TM)-3A family of I/O-optimized field programmable gate arrays (FPGAs) is an extension of its low-cost, high volume Spartan-3 Generation. The Spartan-3A platform provides a cost-reduced solution for applications where I/O count and capabilities matter more than logic density. With support for the industry’s widest range of I/O standards (26) and unique power, configuration [...]

Altera Stratix III FPGAs

Posted by Ken Cheung in FPGA on Monday, November 13, 2006

Altera(R) Stratix III FPGAs feature two new technologies that dramatically lower power while meeting high-performance requirements. Reduced power consumption is achieved by utilizing Altera’s innovative Programmable Power Technology, which maximizes performance where needed while delivering the lowest power elsewhere in the design. Programmable Power Technology enables every programmable logic array block (LAB), DSP block and [...]

Aeroflex RadHard Eclipse FPGA

Posted by Ken Cheung in FPGA on Thursday, October 12, 2006

Aeroflex RadHard Eclipse FPGA offers proven commercial architecture, guaranteed radiation performance and reliability, an efficient low power, high performance FPGA fabric coupled with embedded RadHard SRAM. SpaceWire Embedded Core Protocol Handler will be available for the RadHard Eclipse FPGA in the fourth quarter of 2006.

Aeroflex’s RadHard FPGAs are fabricated on 0.25µm five-layer metal ViaLink epitaxial [...]

Lattice LatticeECP2/M FPGA Family

Posted by Ken Cheung in FPGA on Tuesday, September 19, 2006

The LatticeECP2/M(TM) FPGA family is the industry’s first low cost FPGAs offering high-speed embedded SERDES I/O plus a pre-engineered Physical Coding Sublayer (PCS) block. Based on the innovative LatticeECP2(TM) low cost architecture, the new LatticeECP2/M family also has been developed on advanced 90nm CMOS technology utilizing 300mm wafers. Previously, high-speed embedded SERDES serial I/O with [...]

Actel IGLOO FPGA

Posted by Ken Cheung in FPGA on Monday, August 28, 2006

The Actel IGLOO(TM) family of reprogrammable, full-featured Flash FPGAs is designed to meet the demanding power and area requirements of today’s portable electronics. Based on the Actel nonvolatile Flash technology and single-chip ProASIC3 FPGA architecture, the 1.2 V / 1.5 V operating voltage family offers the industry’s lowest power consumption—as low as 5 µW. The [...]

Actel’s Silicon Sculptor 3 FPGA Programming Tool

Posted by Ken Cheung in FPGA on Tuesday, August 22, 2006

Actel’s Silicon Sculptor 3 is a field-programmable gate array (FPGA) programming tool that delivers high data throughput and promotes ease of use, while lowering the overall cost of ownership. The Silicon Sculptor 3 includes a high-speed USB 2.0 interface that allows a customer to connect as many as 12 programmers to a single PC. Silicon [...]

Celoxica Design Tools and Platforms

Posted by Ken Cheung in FPGA on Saturday, August 19, 2006

Celoxica’s product strategy delivers a comprehensive mix of Electronic System Level (ESL) design solutions that build upon its core competence and leadership in C-based design. Our ESL design solutions cover C-based design and behavioral synthesis tools, FPGA boards and programmable SoC development hardware, libraries of IP and system level APIs for co-design modeling, verification and [...]

If you found this page useful, bookmark and share it on:
 
Embedded Star Newsletter
Don't have time to visit Embedded Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:   

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.