'FPGA' Category Archive

FPGA and EDA Highlights - 2007.12.21

Posted by Ken Cheung in FPGA on Friday, December 21, 2007

Webcast: Evaluating Implementation Choices for Low-Power Digital Sound in SOCs
Tensilica has an on-demand webcast entitled, "Evaluating Implementation Choices for Low-Power Digital Sound in SOCs."
Darnaw1 FPGA Module
Darnaw1 is a Spartan(TM)-3E FPGA module from Enterpoint. The module enables the use of FPGA technology in industrial and military sectors where the volume or assembly technology available precludes the […]

FPGA and EDA News - 2007.12.14

Posted by Ken Cheung in FPGA on Friday, December 14, 2007

Actel LCD Control Solutions
Actel Corporation announced solutions for liquid crystal display (LCD) control applications. The new IGLOO Video Demo Board, LCD adaptor boards with LCD panels, the IGLOO Video Demo Kit (IVDK), and display-related reference blocks use the 5 microwatt (µW) IGLOO field-programmable gate arrays (FPGAs). The new offerings will be attractive to the power-sensitive […]

FPGA and EDA Highlights - 2007.12.07

Posted by Ken Cheung in FPGA on Friday, December 7, 2007

Seminar: Accelerating Silicon Success with Silicon Aware IP
Virage Logic Corporation (NASDAQ:VIRL) and TSMC are offering a free technical lunchinar and demonstration entitled, Accelerating Silicon Success with Silicon Aware IP for Yield Acceleration & Time-to-Volume. The seminar and demonstration will focus on bridging the gap between design and manufacturing and will highlight the STAR(TM) Memory System […]

TED Virtex-5 LX Multi-Application Evaluation Platform

Posted by Ken Cheung in EDA Tools, FPGA on Monday, August 20, 2007

Tokyo Electron Device (TED) has developed a multi-application evaluation platform for the Xilinx(R) Virtex-5 LX 330 FPGA family. TED's Virtex-5 LX Multi-Application Evaluation Platform enables efficient design and evaluation of a wide range of high-speed applications, including consumer products such as high definition televisions, set-top boxes and printers, as well as telecommunications equipment, medical […]

Lattice DDR2 SDRAM Controller IP Core

Posted by Ken Cheung in FPGA, IP Core on Wednesday, August 15, 2007

Lattice's (NASDAQ: LSCC) 533 Mbps DDR2 SDRAM IP core is optimized for the LatticeECP2(TM) and LatticeECP2M(TM) low-cost FPGA families, as well as its high-end LatticeSC(TM) Extreme Performance(TM) FPGA family.
The Double Data Rate Synchronous Dynamic Random Access Memory Controller IP core interfaces seamlessly with industry standard DDR2 SDRAM memory devices and has been performance-tuned for Lattice […]

Xilinx Spartan-3AN FPGA

Posted by Ken Cheung in FPGA on Tuesday, June 26, 2007

The Spartan(TM)-3AN FPGA platform, by Xilinx (NASDAQ: XLNX), combines the performance and functionality advantages of SRAM-based technology with reliable non-volatile flash technology in a single-chip solution. With the industry's largest user flash memory and enhanced security capabilities, this new platform is optimized specifically for non-volatile applications where higher system integration or security is critical. With […]

Altera Automotive Graphics System

Posted by Ken Cheung in FPGA on Tuesday, May 29, 2007

The Altera(R) Automotive Graphics System (AAGS) is a scalable solution that enables design engineers to quickly and efficiently design multiple automotive infotainment products based on a single electronic design. Implemented in Altera's low-cost Cyclone(R) series or high-performance Stratix(R) series FPGAs, the AAGS enables designers to overcome the lengthy and costly design cycles of fixed-function graphic […]

Xilinx Virtex-4 QPRO FPGAs for Aerospace and Defense

Posted by Ken Cheung in FPGA on Wednesday, May 16, 2007

Xilinx Virtex-4 QPRO MIL-grade FPGAs are designed for the aerospace and defense industry. The Virtex-4 QPRO FPGAs provides the industry's most comprehensive 'space to base' device portfolio with higher performance, lower power options, and full military temperature-qualification. The new Virtex-4 QPRO family builds on the existing Virtex-II QPRO device offering, which includes the industry's first […]

360 EC-FPGA Equivalence Checking

Posted by Ken Cheung in FPGA on Tuesday, May 8, 2007

OneSpin Solutions GmbH's 360 EC-FPGA equivalence checking solution supports all sequential optimizations performed by FPGA synthesis tools on large designs, enabling designers to meet functional, performance and cost targets, with minimal manual intervention. It is ideal for both prototyping and production-part verification. The new 360 EC-FPGA enhances OneSpin's established 360 EC ASIC equivalence checker with […]

Xilinx 65nm Virtex-5 SXT FPGA

Posted by Ken Cheung in DSP, FPGA on Tuesday, April 24, 2007

The Xilinx 65nm Virtex(TM)-5 SXT field programmable gate arrays (FPGAs) are optimized for high-performance digital signal processing (DSP). The SXT platform establishes an industry record for DSP performance delivering 352 GMACs at 550MHz, while consuming 35 percent less dynamic power as compared to previous 90nm generation devices, and is the first DSP-optimized FPGA family to […]

Xilinx ISE WebPACK 9.1i

Posted by Ken Cheung in FPGA on Monday, March 19, 2007

Xilinx's Integrated Software Environment (ISE(TM)) WebPACK(TM) 9.1i is the latest version of the company's free downloadable programmable logic design suite. The new version includes all the features of the 9.1i release of the popular Xilinx ISE Foundation(TM) software with full support for optional embedded, digital signal processing (DSP) and real-time debug design flows. Most notably, […]

Aldec Active-HDL Lattice Designer Edition Lite

Posted by Ken Cheung in FPGA on Tuesday, February 13, 2007

The Aldec Active-HDL Lattice Designer Edition Lite is a FPGA design tool. It supports mixed VHDL and Verilog simulation for Lattice's leading FPGA devices, including the 90nm Extreme Performance(TM) LatticeSC(TM) family as well as the 90nm LatticeECP2M(TM) family, which is the industry's only low-cost FPGA family with unequaled on-chip memory capacity and 3.125 Gbps SERDES […]

Atmel ATF15xxBE 1.8V CPLDs

Posted by Ken Cheung in FPGA on Wednesday, January 3, 2007

The Atmel ATF15xxBE family of ROHS-compliant, 1.8V CPLDs feature standby power consumption of just 5 uA — over 60% less power drain than the nearest competing CPLD. Operating power consumption is 1 mA at 20 MHz or less. Available in densities ranging from 32 to 128 macrocells, ATF15xxBE CPLDs can be used to implement system […]

Xilinx Spartan-3A FPGAs

Posted by Ken Cheung in FPGA on Monday, December 11, 2006

The Xilinx Spartan(TM)-3A family of I/O-optimized field programmable gate arrays (FPGAs) is an extension of its low-cost, high volume Spartan-3 Generation. The Spartan-3A platform provides a cost-reduced solution for applications where I/O count and capabilities matter more than logic density. With support for the industry's widest range of I/O standards (26) and unique power, configuration […]

If you found this page useful, bookmark and share it on:
 
Embedded Star Newsletter
Don't have time to visit Embedded Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:   

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.