'FPGA' Category Archive

Fast Fourier Transform and FIR Filter Compiler DSP IP Cores

Posted by Ken Cheung in DSP, FPGA, IP Core on Wednesday, May 6, 2009

eASIC introduced two new DSP IP cores, an FFT and FIR Filter Compiler. The FT core supports point sizes from 16 to 16K points and data rates up to 100 MSPS with a compact footprint. The FIR Compiler core (available from Steepest Ascent) can process data streams as high as 500 MSPS and is ideal [...]

FPGA and EDA Highlights - 2007.12.21

Posted by Ken Cheung in FPGA on Friday, December 21, 2007

Webcast: Evaluating Implementation Choices for Low-Power Digital Sound in SOCs
Tensilica has an on-demand webcast entitled, “Evaluating Implementation Choices for Low-Power Digital Sound in SOCs.”
Darnaw1 FPGA Module
Darnaw1 is a Spartan(TM)-3E FPGA module from Enterpoint. The module enables the use of FPGA technology in industrial and military sectors where the volume or assembly technology available precludes the [...]

FPGA and EDA News - 2007.12.14

Posted by Ken Cheung in FPGA on Friday, December 14, 2007

Actel LCD Control Solutions
Actel Corporation announced solutions for liquid crystal display (LCD) control applications. The new IGLOO Video Demo Board, LCD adaptor boards with LCD panels, the IGLOO Video Demo Kit (IVDK), and display-related reference blocks use the 5 microwatt (µW) IGLOO field-programmable gate arrays (FPGAs). The new offerings will be attractive to the power-sensitive [...]

FPGA and EDA Highlights - 2007.12.07

Posted by Ken Cheung in FPGA on Friday, December 7, 2007

Seminar: Accelerating Silicon Success with Silicon Aware IP
Virage Logic Corporation (NASDAQ:VIRL) and TSMC are offering a free technical lunchinar and demonstration entitled, Accelerating Silicon Success with Silicon Aware IP for Yield Acceleration & Time-to-Volume. The seminar and demonstration will focus on bridging the gap between design and manufacturing and will highlight the STAR(TM) Memory System [...]

TED Virtex-5 LX Multi-Application Evaluation Platform

Posted by Ken Cheung in EDA Tools, FPGA on Monday, August 20, 2007

Tokyo Electron Device (TED) has developed a multi-application evaluation platform for the Xilinx(R) Virtex-5 LX 330 FPGA family. TED’s Virtex-5 LX Multi-Application Evaluation Platform enables efficient design and evaluation of a wide range of high-speed applications, including consumer products such as high definition televisions, set-top boxes and printers, as well as telecommunications equipment, medical [...]

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