Model-Based Design Reduces ASIC Development Time

Semtech, a leading supplier of analog and mixed-signal semiconductors, reduced their ASIC development time by adopting Model-Based Design (with MathWorks MATLAB and Simulink). Using system models for simulation and automatic HDL generation, Semtech engineers created FPGA prototypes 50% faster, reduced verification time from weeks to days, and shortened development time by 33% compared to their previous hand-coded VHDL methodology.

According to Frantz Prianon of Semtech, the new approach using automatic HDL generation with Simulink “enabled us to explore more alternatives and new features, and ultimately deliver a more optimized, better performing design. Once we have simulated the model, we can generate VHDL directly and prototype an FPGA. It saves a lot of time, and the generated code contains some optimizations we hadn’t thought of.”

Like many companies, Semtech already used MATLAB and Simulink to develop algorithms and floating-point system specifications. Now they can use those same models to explore new features, evaluate multiple design ideas, and optimize performance, power consumption, and layout area. Those optimizations involve the interplay of multiple components such as CIC and FIR filters, sigma-delta converters, phased-locked loops, and other parts of the system. With Simulink, different Semtech engineers can independently design each component and then integrate them into a system model for performance evaluation and verification. Once verified in simulation, they generate VHDL automatically for FPGA prototyping. Iterations to further optimize the design took weeks in the previous process; now they are done within hours. Ultimately, they use the same generated VHDL code for their production ASIC implementation. As a result, they have not only reduced the time from requirements to tape-out; they were also able to “deliver a more optimized, better-performing design,” according to Prianon.

The adoption of Model-Based Design and automatic HDL generation is being driven by several trends. The Semtech case represents one of those trends: they are at leading edge of semiconductor companies that are transitioning to new system-level methodologies for highly integrated mixed-signal devices. Model-Based Design enables them to model and simulate their mixed-signal design in Simulink and then generate HDL code automatically from their system models.

Another trend is the growing interest in FPGAs by embedded system engineers who need hardware co-processing to implement high-speed algorithms and I/O functions. They also need tools that help them model more complex designs, simplify the FPGA development process, and integrate hardware and software design flows.

Common to both of these cases is the trend toward greater system complexity as more devices add digital signal processing for wireless, vision, and streaming media applications. As a result, hardware and software engineers need to incorporate new algorithm IP to differentiate their products. In addition to the simulation and code generation capabilities, libraries of off-the-shelf algorithms available with MATLAB and Simulink make it easier and faster to design, prototype, and implement these complex functions.

This contributed article was written by MathWorks.