PMC-Sierra PM6373 POLO 40G SoC for Coherent Optical Networking

PMC-Sierra introduced the PM6373 POLO 40G System-on-Chip for coherent optical networking. The SoC is a single chip CMOS coherent DP-(D)QPSK transmission transceiver. The PMC-Sierra PM6373 POLO 40G features chromatic dispersion (CD), polarization mode dispersion (PMD), second order PMD (SOP), and high-rate polarization tracking. The device will sample later this year. The POLO 40G is implemented in 40nm CMOS technology and packaged in a 480-pin 23mm x 23mm FCBGA package.

PMC-Sierra PM6373 POLO 40G System-on-Chip (SoC) for coherent optical networking

PMC-Sierra PM6373 POLO 40G System-on-Chip Features

  • 43-50 Gbit/s Coherent Intradyne Detection support
  • DP-DQPSK and DP-QPSK pre-coder and modulation support
  • Standards-compliant OTL3.4 for polarization resolve and blind equalization
  • Proprietary training sequence for superior cycle slip performance in book-ended operation
  • Integrated LO (Local Oscillator) and VGA (Variable Gain Amplifier) control loop support
  • Line Side support for 18.8% Hard Decision Swizzle XLR FEC
  • Line Side support for Industry Standard G.709 RS FEC
  • Line Side support to transparently pass 7% to 20% overhead OTU3 client signal through the device
  • Integrated 25-GSample/s 6-bit four-phase Flash ADC
  • 5-bit Effective Number of Bits and 6-bit Physical Number of Bits
  • Automatic background and power-on calibration hardware
  • Four differential 10.7-12.5-GHz differential output to the MZ pre-driver (XI, XQ, YI, YQ)
  • Four differential 10.7-12.5-GHz differential inputs from the TIA receiver (XI, XQ, YI, YQ)
  • Transmit and receive per-lane and per-interface skew control
  • Compliant to OIF Receiver and Transmitter Optical Sub-assembly specifications for CFP2 applications
  • Chromatic Dispersion Tolerance: 0 to 55,000 ps/nm
  • Differential Group Delay (DGD) Tolerance: 100 ps
  • TX vs RX Local Oscillator frequency tolerance: +/- 7.5 GHz
  • ITU G.709, G.798, OIF compliant SFI 5.1 operating between 2.488 Gbit/s and 3.125 Gbit/s
  • Supports OTU3/OTU3e1/OTU3e2 operation compliant to G.8251
  • G.709 Standard RS FEC can be terminated and regenerated or passed through the device
  • G.975 Arbitrary 7% OTU3 FECs including PMC 7% Swizzle FEC
  • Independent TX and RX reference clocks for regeneration applications
  • Independent transmit skew control for I/Q and X/Y
  • Half-rate and full-rate output clock to support NRZ (Non Return to Zero) and RZ applications
  • Full OTN overhead management through SPI processor interface
  • GCC Overhead management via either SPI or device pin interface

More info: PMC-Sierra