Tensilica ConnX BBE64-128 and BBE64-UE DSP IP Cores

Tensilica introduced the ConnX BBE64-128 and BBE64-UE DSP (digital signal processor) IP (intellectual property) cores for SOC (system-on-chip) design. The ConnX BBE64-128 IP core features 100+ GigaMACs performance in 28nm high-performance process technology. The ConnX BBE64-UE is optimized for the low power and small area requirements of LTE Advanced handsets. An evaluation kit for the ConnX BBE64-128 and ConnX BBE64-UE cores is expected to be available in the fall of 2011.

Tensilica ConnX BBE64-128 Features

  • Over 100 GigaMACs performance in 28nm high-performance process technology
  • High-performance “soft bit” vector data types and operations including arbitrary field insertion and extraction for complex transmit operations, resulting in over 250 general 10-bit operations per cycle
  • Parallel register files for 10/20-bit and 40-bit data types for easier compilation and higher performance at lower power
  • Large register files for performance on complex code, reduced memory bandwidth requirements, reduced power and easier compilation
  • Single-cycle 16-way complex radix-4 and radix-8 FFT (fast Fourier transform) and DFT (discrete Fourier transform) for efficiency on arbitrary size transformations common to OFDM (orthogonal frequency-division multiplexing) algorithms
  • Accelerated interleaving for all bit, byte, half-word and word vector types for flexibility and efficiency in HARQ (hybrid automatic repeat request), forward error correction and convolutional coding
  • Cellular modem acceleration with an optimized capability for max-index search, demap, despread, vector divide, vector recip and square root
  • Multiple parallel execution units of each type to provide greater instruction scheduling flexibility and higher performance on code that uses one execution type heavily
  • Expanded vector memory operations for easier automatic compilation of complex C code at maximum performance on any data size and placement
  • A high-performance AXI interface for easy shared memory connection to memory and other cores
  • Ability to optimize design for specific needs by adding custom instructions in minutes with Tensilica’s automated tools
  • The widest range of pre-defined “point-and-click” configuration options in Tensilica’s history for maximum design flexibility

Tensilica ConnX BBE64-UE Features

  • Specifically optimized for the low power and small area requirements of LTE Advanced handsets
  • Based on the new ConnX BBE64 architecture
  • Based on a minimum feature set for minimum energy and latency
  • Optimized for interface with low-power specialized engines (programmable or hard wired)
  • About 300,000 GMAC/second/Watt in 28nm low-leakage process technology

More information: Tensilica