STMicroelectronics SPEAr1300 Microprocessors for Embedded Systems

STMicroelectronics introduced the SPEAr1300 embedded microprocessors for embedded systems. The SPEAr1300 features dual ARM Cortex-A9 processors with a DDR3 memory interface and is manufactured in ST’s low-power 55nm HCMOS (high-speed CMOS) process technology. The new SPEAr (Structured Processor Enhanced Architecture) processors support fully symmetrical operation, at speeds up to 600MHz/core for 3000 DMIPS equivalent. Initial samples has already been shipped to early adopters.

STMicroelectronics SPEAr1300 Architecture Features

  • Dual ARM Cortex-A9 cores, running at 600MHz for 3000 DMIPS equivalent
  • 64-bit AXI (AMBA3) bus Network-on-Chip technology
  • DRAM and L2 cache with Error Correction Code (ECC)
  • 533MHz 32-bit DDR3 memory controllers with ECC; 16-bit DDR2 also supported
  • Accelerator coherence port
  • Gigabit Ethernet
  • PCIe 2.0 supporting 5 GT/s (Gigatransfers/second)
  • SATA II 3 Gbit/s
  • USB 2.0
  • 256-bit key hardware encryption/decryption
  • 1.3 million gates of configurable logic
STMicroelectronics SPEAr1300 embedded microprocessors for embedded systems

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