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ScanWork Validation and Testing Tools Support Future Intel Platforms

Posted by Ken Cheung in Test Solution on Thursday, March 11, 2010

ASSET InterTech has enhanced their validation and testing tools for Intel’s future platforms. ASSET’s ScanWorks platform for embedded instruments will continue to support Intel’s Interconnect Built-In Self Test (IBIST) technology, which is embedded in the processors and chip sets. In addition, ScanWorks will provide a comprehensive validation solution for high-speed input/output (I/O) on Intel platforms.

The ScanWorks validation tools for Intel IBIST include functionality to perform bit error rate testing (BERT) as well as margining tests. In validation applications, these types of tests can be employed to validate that the high-speed serial I/O buses on a circuit board design will perform as expected before the design moves into high-volume manufacturing. ScanWorks’s next-generation tools will support all major high-speed I/O buses, including QPI, PCI Express (PCIe), Direct Memory Interface (DMI), and Double Data Rate 3rd Generation (DDR3).

ASSET InterTech, through its ScanWorks platform, is applying the experience it has gained from two decades as a leading supplier of IEEE 1149.1 boundary-scan (JTAG) test tools to the development of open embedded instrumentation tools. The boundary-scan infrastructure that is embedded into chips and circuit boards is one of several technologies that can form the basis for an embedded instrumentation toolset. In recent years, ASSET has enhanced ScanWorks beyond boundary-scan test with the addition of other embedded instrumentation technologies, including processor-controlled test (PCT) and tools for Intel IBIST (Interconnect Built-In Self Test), an embedded instrumentation technology that Intel and other companies are embedding into next-generation chips and chipsets.

More info: ASSET InterTech

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