Virage Logic introduced the ARC 601 32-bit microprocessor core. The ARC 601 runs at 532MHz (1.2 DMIPS/MHz) and consumes only 13 µW/MHz in 65-nanometer (nm) process technology. The IP core is only 0.039 mm2 in size and will fit 2.5 times into the size of the dot (12 point font) at the end of a sentence. The processor is available now and has already been licensed to several of Virage Logic’s lead customers. The core is targeted at audio, imaging, portable, storage, consumer, wireless, and security applications.
Designers can tailor the highly configurable ARC 601 to meet their specific application needs and exclude processor features that are not required, further reducing area, power consumption and cost. The processor’s single-cycle ICCM (Instruction Closely Coupled Memory) and DCCM (Data Closely Coupled Memory) optimize embedded performance while minimizing the overall system footprint. The ARC 601 is also extensible with user-defined instructions and register settings that can deliver a performance boost of five to 100 times for critical routines.
The ARC 601 features the size-optimized ARCompact 16-/32-bit Instruction Set Architecture that reduces code size by as much as 40%. This makes it an ideal solution for deeply embedded applications or for upgrading 8-bit and 16-bit microcontroller applications to 32-bit performance where small size and low power are essential. The ARC 601 is instruction set compatible with all of the processors in the ARC 600 and ARC 700 families.
The ultra compact and low power 32-bit ARC 601 processor is supported by a full suite of development tools. This includes the acclaimed MetaWare Development Kit (v8.4.0) that generates highly efficient code that is ideal for deeply embedded applications, the ARC simulators including xCAM (v2.1.7) and xISS (v3.1), and the ARChitect configuration tool (v2.14.79). All of the tools needed for development with the new ARC 601 are available now.
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