Tensilica announced the Xtensa LX3 high-performance dataplane processor (DPU) core. The Xtensa LX3 DPU is optimized for digital signal processing (DSP) and control in the system-on-chip (SOC) dataplane. The Xtensa LX3 DPU offers a wide range of pre-verified DSP options ranging from a simple floating point accelerator to a 16-MAC (multiply accumulator) vector DSP powerhouse. The Xtensa LX3 customizable DPU is available now.
The base Xtensa LX3 DPU configuration can reach speeds of over 1 GHz in 45nm process technology (45GS) with an area of just 0.037 mm2 and power of 0.015 mW/MHz. When built with the ConnX Baseband Engine DSP (ConnX BBE), the Xtensa LX3 processor delivers over 10 Giga-MACs-per-second performance, running at 625 MHz with a footprint of 0.93mm(2) (post place-and-route 45GS) and consuming just 170 mW (including leakage).
The Xtensa LX3 DPU has been fine-tuned with optimized scripts for the latest generation of EDA tools, to deliver even better speed-power-area results than the predecessor Xtensa LX2 cores. When comparing functionally equivalent configurations of the Xtensa LX3 DPU versus the prior generation Xtensa LX2 DPU, the new Xtensa LX3 processor delivers up to 15% faster clock speed, up to 20 percent smaller die area and up to 15 percent less power using identical process technologies and libraries.
Pre-verified DSP Options for Xtensa LX3 DPU
- ConnX D2 DSP — a new 16-bit dual-MAC SIMD (single instruction multiple data) DSP for communications
- ConnX Vectra LX DSP — an updated 16-bit quad-MAC SIMD DSP for communications (with new option for single load/store unit)
- HiFi 2 audio DSP — the most widely licensed audio DSP on the market today, a 24-bit, dual-MAC audio processor
- A 32-bit IEEE-754 compliant single-precision floating point unit
- A new 64-bit IEEE-754 compliant double precision floating point accelerator
More info: Tensilica