AppliedMicro APM 83290 System on Chip

Applied Micro Circuits Corporation introduced the APM 83290 System on Chip (SoC). According to AMCC, the APM 83290 is the highest performance Power Architecture solution available in bulk CMOS process. The APM 83290 features proprietary PacketPro and MultiEase technologies. The Soc is ideal for wireless infrastructure, enterprise, storage, entertainment, multifunction printer, and communications applications. AppliedMicro’s APM 83290 is available now in sample quantities with production quantities expected in Q1 2010.

The APM 83290 includes a processor subsystem that integrates two Titan cores based on Power Architecture technology with frequencies of 1.5 GHz per core. The Titan core is a superscalar, dual-issue, out-of-order core designed to achieve industry leading single thread performance on a per clock basis. Along with high performance, innovative circuit design techniques enable the APM 83290 to deliver speeds of 1.5 GHz in 90nm bulk CMOS while comparable designs require 45nm SOI process technology to achieve similar operating speeds. This combination of performance and price flexibility makes this solution attractive for many low cost application areas that traditionally were not serviced by Power Architecture products.

The APM 83290′s PacketPro consists of a number of acceleration blocks designed to offload the processor subsystem from commonly occurring tasks in networking applications. A fundamental component of PacketPro is a message passing architecture that simplifies data movement between the various acceleration blocks and provides Quality of Service guarantees for each flow regardless of the loading from other flows. This Quality of Service is guaranteed via a powerful and flexible Queue Manager and Traffic Manager (QMTM) block. Instead of using isolated operation offloads, the acceleration blocks are designed to offload entire protocol level tasks in order to reduce processing overhead and increase application performance. These blocks are fully software programmable in order to support proprietary features and provide upgradability for future protocol enhancements.

AppliedMicro’s MultiEase technology allows customers to reduce development efforts and accelerate their time to market schedules by providing virtualization of on-chip resources, fault isolation debug and error recovery. This allows customers to easily migrate applications originally developed for single core microprocessor systems into a multi-core environment. In addition, the APM 83K series is code compatible with PowerPC products, giving developers the flexibility to leverage their software development efforts and tool sets into new multi-core applications.

The hardware features of the APM 83290 SoC include dual Titan cores, each with a floating point unit, 512KB of shared L2 Cache memory with ECC support, full hardware memory and I/O coherency, 64-bit DDR2 SDRAM interface, security acceleration for IPSec, SSL, Kasumi, SNOW3G and public-key protocols. Other features include a classification engine, multi-channel DMA engine, and high speed interfaces for Gigabit Ethernet ports, IEEE1588v2 support, PCI Express v2.0, Serial RapidIO, USB and SATA.

More info: AppliedMicro