The NEC V850E2M dual core architecture features two 32-bit V850 CPU cores, each delivering high performance levels of 2.563 Dhrystone MIPS per MHz, while enabling low power consumption of 1.5mW per MIPS. The V850E2M core is also available as redundant core architecture, offering high reliability and development efficiency. The redundant cores monitor each other at each instruction by executing the same program code and using the same data. Critical faults can therefore be detected at a very early stage by hardware, reducing the workload of the software designers to implement functional safety. The V850E2M microcontroller unit (MCU) is ideal for automotive and industrial automation systems.
NEC Electronics’ V850E2M dual core architecture enables system designers to develop embedded systems with higher performance and increased system reliability while maintaining low power consumption. NEC is leveraging the scalability of the V850E2M core in its products using sub-100nm technology. The core will be also available for designs using NEC Electronics’ ASIC technology in the third quarter.
V850E2M CPU Core Features
Employs two 32-bit CPU core
The CPU core has been designed to support a multicore architecture, which offers unified memory architecture (UMA) technology in which each CPU has access to the same memory context. This makes it possible for the V850E2M dual core to provide the high-performance levels required for demanding environments with processing performance of 2.563 Dhrystone MIPS per MHz per core while still maintaining low power consumption.
Implements redundant core architecture
The V850E2M core incorporates a complete package of safety features such as lock step implementation where two cores mirror the operations of the other and check if both come to the same conclusion. This redundant core architecture enables system designers to reduce total system cost and simplifies system development by removing redundant system requirements.
More info: NEC Electronics