The SH77650, from Renesas, is a single-chip SoC product optimized for image-recognition processing functions. The device enables the production of more affordable vehicle information terminals, particularly the next-generation car navigation systems and peripheral devices that can help increase driving safety. In addition to automotive applications, the SH77650 is also ideal for security equipment for business and industrial applications. The SH77650 is available now for $51.
The device features an image-recognition processing accelerator (specialized hardware that performs the computations necessary to identify road conditions via image data captured by a camera or similar device). The hardware accelerator can run multiple external image recognition programs such as roadway lane recognition or the detection and tracking of the cars and trucks ahead simultaneously and in real time. This capability makes it possible to realize sophisticated safety functions in a moving vehicle, such as adaptive cruise control. To facilitate the development of such applications, Renesas offers an image-recognition library containing approximately 200 functions. The new product also allows the reuse of existing engineering resources to save cost, including application software that customers had originally developed for the previous-generation product.
When operating at 300MHz, the SH-4A CPU core in the SH77650 achieves excellent processing performance: 540 MIPS (million instructions per second). In addition, the SoC device’s on-chip floating-point processing unit (FPU), which supports both single- and double-precision calculations, delivers 2.1 GFLOPS (giga floating-point operations per second) in single-precision mode at that speed. These high levels of performance enable the design of powerful image-recognition processing systems.
The SH77650 offers a variety of other on-chip peripherals required for automotive image-recognition applications. They include video input interface and display functions, a dedicated DMA controller, timers, a serial communication interface, and a CAN interface for in-vehicle LANs. An on-chip bus arbitrator supports three access priority levels so internal functions can access external memory efficiently. There is also a 32-bit dedicated external bus that can connect to high-speed DDR1-SDRAM (Double Data Rate 1 – Synchronous DRAM), and a 32-bit expansion bus that enables connections to external flash memory or SRAM. These on-chip peripheral functions and features allow this one chip to handle all of the main capabilities of an image recognition system. As a result, system engineers can produce designs that have fewer parts and cost less.
More info: Renesas Technology