IBM Creates Smallest SRAM Memory Cell
IBM (NYSE: IBM) and its joint development partners — AMD, Freescale, STMicroelectronics, Toshiba and the College of Nanoscale Science and Engineering (CNSE) — announced the first working static random access memory (SRAM) for the 22 nanometer (nm) technology node, the world’s first reported working cell built at its 300mm research facility in Albany, NY. SRAM chips are precursors to more complex devices such as microprocessors.
CoWare Debuts MIPS Instruction Set Simulators for MIPS32 Cores
CoWare®, Inc. and MIPS Technologies, Inc. (Nasdaq:MIPS) announced a partnership to deliver ultra high-speed MIPS-Verified[tm] Instruction Set Simulators (ISS) of MIPS32® cores. These models, developed with CoWare Processor Designer technology, will be verified by MIPS Technologies to achieve the MIPS-Verified label, and will be distributed by CoWare as part of its comprehensive ESL 2.0 design environment including CoWare Virtual Platform. The first available ISS is for the low-power, high-performance MIPS32® 24K® core.
EMCoS, Dolphin Integration Team on VHDL-AMS for EMC, Signal Integrity
EMCoS, a leading provider of simulation software for electromagnetic problems and data visualization, and DOLPHIN Integration, creator of the multi-domain and multi-level simulator SMASH with its renowned VHDL-AMS compliance, announce their solution for EMC and Signal Integrity simulation in automotive electronics applications.
Electronics.ca Publishes Printed Circuit Board Industry Report
Electronics.ca Publications, the electronics industry market research and knowledge network, announces the availability of a new report entitled “Advanced Printed Circuit Board (PCB) Industry Report, 2007-2008.” Advanced PCB (printed circuit boards) mainly refers to non-traditional PCB, including mobile phone board and photoelectric board; only hard board is set as the research object without involving soft board. 40% of the world’s PCB is produced in the uppermost manufacturing bases – China and Taiwan.
Cadence Upgrades Allegro, OrCAD Products
Cadence Design Systems, Inc. (NASDAQ: CDNS) announced a sweeping set of improvements to the Cadence® Allegro® and OrCAD® families of products aimed at boosting performance and productivity through new features and functionality. Part of the Cadence SPB 16.2 release, the new technology helps deliver shorter, more predictable design cycles for PCB designs. With significant improvements for designers using high-density interconnect (HDI), the technology will be of particular value to customers in the high-end consumer electronics market.
Cadence Announces New SPB 16.2 Capabilities
Cadence Design Systems, Inc. (NASDAQ: CDNS) announced its SPB 16.2 release, which focuses aggressively on addressing current and emerging chip package design challenges. This latest release delivers advanced IC package/system-in-package (SiP) miniaturization, design cycle reduction and DFM-driven design, along with a new power integrity modeling solution. These new capabilities can boost productivity of digital, analog, RF and mixed-signal IC package designers involved in single and multi-die packages/SiPs.
Xilinx Announces Extended Spartan-3A FPGA Family
Xilinx(R), Inc. (Nasdaq: XLNX) announced the production availability of small form-factor packages for its Extended Spartan(R)-3A family of FPGAs, delivering breakthrough price points and enabling the reduction of total system costs for building cost-sensitive applications targeting consumer, wired and wireless communications, networking, industrial and many other markets. In addition to the new package options, the Extended Spartan-3A family provides a broad range of densities (from 50,000 to 3.4 million system gates), and power management features.
Lattice Semiconductor Releases PAC-Designer 4.99a Design Tool Suite
Lattice Semiconductor (NASDAQ: LSCC) announced the release of its PAC-Designer® software design tool suite, version 4.99a. The tool suite now supports Lattice’s AECQ100-qualified automotive Power Manager II (LA-ispPAC®-POWR1014/A) devices. The PAC-Designer tool suite also provides easy to use, point-and-click, intuitive design and verification support for all Power Manager and ispClock[TM] mixed signal devices.
HyperTransport Technology Consortium Reveals HTX3 Specification
The HyperTransport[tm] Technology Consortium announced it has released its new HTX3[tm] specification, a major enhancement to its HTX[tm] expansion connector specification. The HTX Connector specification defines the electrical and mechanical characteristics of an EATX motherboard interface connector, enabling CPUs to connect directly via a HyperTransport link to add-in card subsystems requiring HyperTransport’s state-of-the-art low latency and bandwidth. The EATX motherboard is used in high-performance workstations, servers, embedded systems and storage systems.