News 2008.07.22

Kontron Releases Universal Graphics Module Standard Revision 1.1
Kontron announces revision 1.1 of the Universal Graphics Module (UGM) standard for long-term available and custom scalable high-end PEG graphics. This new revision optimizes system design and reduces costs by defining the height of UGM Graphic-on-Modules in accordance with the PICMG-defined COM Express[tm] specification. This enables designers working with COM Express[tm] modules and UGM Graphic-on-Modules to use a single heat sink for their entire design.

GE Fanuc Intelligent Platforms Rolls Out Embedded Computing Solutions
GE Fanuc Intelligent Platforms said that it planned to expand its reach by delivering embedded computing solutions across an even wider range of applications and environments. Traditionally, the company has provided solutions to customers for military/aerospace, telecommunications and industrial applications, but these new products are aimed at companies operating in light industrial, simulation and testing, medical, security, point of sales and gaming/entertainment.

MontaVista Webinar Focuses on Intel Atom Embedded Linux Power Management
MontaVista® Software, Inc., the leader in embedded Linux® commercialization, presents a web seminar in cooperation with Intel® on power management considerations and programming techniques for embedded Linux applications for the Intel® Atom[TM] processor.

Texas Instruments Reveals Roadmap for Low-Power Processor
Texas Instruments Incorporated (NYSE: TXN) (TI) introduced its breakthrough low-power processor roadmap with more than 15 new devices across four product lines. For the first time, designers will be able to easily bring portability to applications requiring high-precision floating-point processor capabilities, as TI’s new roadmap includes the industry’s lowest power floating-point digital signal processor (DSPs).

Numonyx Introduces Velocity LP NV-RAM DDR Interface Non-Volatile RAM
Numonyx B.V. introduced its Velocity LP[tm] NV-RAM product family – the industry’s fastest low-power, double-data-rate (LPDDR) non-volatile memory – giving mobile phones and other consumer electronics makers better memory performance at lower costs than current solutions. The new devices deliver two to three times faster read bandwidth performance improvement over traditional NOR Flash memory, while providing a cost saving alternative to platforms using high DRAM content.

VMETRO Introduces FusionXF FPGA Development Kit
VMETRO announced the FusionXF FPGA development kit. FusionXF is targeted at reducing the design time and optimizing the performance of complex FPGA and PowerPC processing systems. It aids customers in the development of their FPGA algorithms and logic for VMETRO’s customer programmable FPGA products. While FusionXF is very useful for a single FPGA design, it is invaluable in larger embedded real-time DSP system designs where there is a need to integrate and move data between multiple distributed FPGAs and processors.

Research and Markets Publishes FPGA Prototyping Using Verilog Examples
Research and Markets has announced the addition of the “FPGA Prototyping Using Verilog Examples” report to their offering. The book utilizes a “learn by doing” approach to introduce the concepts and techniques of Verilog and FPGA to designers through a series of hands-on experiments.

Mentor Consulting Optimizes Calibre Flow for Dongbu HiTek
Mentor Graphics Corporation (Nasdaq: MENT) announced that its consulting division has successfully completed an engagement at Dongbu HiTek, resulting in a 50% reduction in tape-to-mask turnaround time (TAT) while maintaining consistent manufacturing quality and yield. The improvements were achieved by optimizing Dongbu HiTek’s overall RET/MDP flow and taking advantage of the newest capabilities of the Calibre® OPC and Calibre OPCverify[tm] software solutions.

SEMATECH 3D Workshop Addresses Equipment Challenges for Interconnect
A host of industry experts involved in the development and implementation of 3D interconnect technology gathered at a SEMATECH-led workshop to explore equipment challenges for 3D interconnect, comparing application requirements to those proposed by the International Technology Roadmap for Semiconductors (ITRS). The workshop entitled “Equipment Challenges for 3D Interconnect,” explored the challenges for making wafer processing equipment capable for 3D interconnects.