Novelics recently introduced a one-transistor SRAM for 65nm semiconductor design — the only SRAM-1T memory available to SoC designers in bulk CMOS using the standard silicon wafer process. Novelics pure bulk CMOS coolSRAM-1T products are in high-volume production in the 130nm process and currently available in the 90nm and 65nm processes at the Taiwan Semiconductor Manufacturing Corporation (TSMC). The technology is currently undergoing qualification at 45nm nodes.
Novelics’ coolSRAM-1T is designed to optimize memory-intensive applications in computing, networking, wireless, multimedia, graphics, automotive, and consumer electronics products. Novelics does this by:
- Shrinking the SoC embedded memory area up to 50 percent versus using industry-standard SRAM
- Lowering development time and costs through standard bulk CMOS that eliminates extra mask layers and special processing steps
- Reducing memory leakage power consumption by a factor of 10
- Offering the opportunity in many designs to reduce or eliminate off-chip memory systems, enabling dramatic savings in system cost and power consumption
Automatically generated by Novelics’ MemQuest memory circuit compiler, coolSRAM-1T memory instances can be customized by Novelics’ customers for their specific SoC design in a matter of hours instead of the months typically required for development time. The MemQuest compiler is an online tool that allows designers to customize the various attributes of the memory such as size, aspect ratio, area, access time, power consumption and leakage. It is designed to offer a significant advantage over the fixed-sized, hard-macro solutions available on the market today.
More info: Novelics