AVIX-RT recently introduced the AVIX32 32-bit RTOS for Microchip PIC32 MIPS based microcontrollers. The AVIX32 is especially strong in interrupt integration, an important aspect for the highly advanced nested interrupt architecture offered by PIC32. AVIX32 offers an interrupt model never disables hardware interrupts. As a result, an extra cycle is not needed. With the AVIX32, interrupt latency equals that of the hardware while still offering full integration and communication between the interrupt handlers and the threads running under control of AVIX32. This unique feature is AVIX32 is known as a zero latency RTOS.
AVIX32 offers a software based system stack for use by interrupt handlers, lowering the load on the stacks of the individual threads. In contrast with the approach followed by competing products, AVIX32 fully takes over the interrupt code, not relying on code generated by the compiler. As a result, the load placed on the stacks of individual threads is much lower than is the case with competing products. This results in AVIX32 using ~10KB less RAM on an average application compared to competing products.
For testing and validation, AVIX32 offers Real Time Thread Activation Tracing, a non-intrusive mechanism showing the activation of threads on a logic analyzer. This mechanism is usable both during development and in the end-product and offers unprecedented insight in you applications behavior.
Beside these unique features, AVIX32 offers mutexes, semaphores, pipes, timers, message queues, and event flags. All this functionality is accessible trough a user friendly and largely type safe API allowing programming errors to be found compile time instead of runtime.
More info: AVIX-RT