ACT/Technico SATA PMCDisk Simplifies Mass Storage Requirements
ACT/Technico, a leading supplier of embedded products and systems solutions built with CompactPCI, VMEbus, and other open architecture platforms, now offers a SATA-based mass storage PMC that simplifies data storage requirements while incorporating advanced serial storage technology for increased data transfer rates. The cost-effective RoHS-compliant SATA PMCDisk replaces hard drives and disk modules that require external fixtures or system slots.
STMicroelectronics Unveils STv0986 Mobile Image Signal Processor
STMicroelectronics (NYSE: STM) has introduced a new high-performance, stand-alone Image Signal Processor with dual-camera support that brings DSC-like performance to mobile imaging applications. Capable of controlling the entire imaging subsystem in a mobile phone, ST’s newest digital image processor supports a wide range of camera modules including SMIA-compatible (Standard Mobile Imaging Architecture) sensors with up to 5-megapixel resolution.
CLK Design Automation Introduces TSSTA for TSMC Reference Flow 9.0
CLK Design Automation, Inc. introduced transistor statistical static timing analysis (TSSTA) for TSMC’s Reference Flow 9.0 to lower design obstacles, improve design margins, and increase 40-nanometer (nm) technology yields. The new Amber[tm] FX Transistor SSTA product, announced separately today by CLK Design Automation, delivers near SPICE accuracy for timing delay and process variance based on TSMC’s advanced manufacturing models.
KLA-Tencor Unveils Archer 200 Overlay Metrology System for 32nm Design
KLA-Tencor (NASDAQ:KLAC) introduced its latest overlay metrology system, the Archer 200, featuring an enhanced optical system that provides significant performance improvements that are critical to help customers meet the much tighter overlay requirements for double-patterning lithography at the 32nm design rule node.
Spectrum Microwave Offers Wideband Switches with High Isolation, Frequency
Spectrum Microwave introduces their newly expanded line of switches now offering SPDT to SP5T designs with a wide bandwidth from 100 MHz to 22 GHz. These high performance switches feature an integral TTL driver and are available with fast switching speeds of better than 100 nsec, high isolation of up to +95 dB and insertion loss as low as 0.8 dB.
Innovaide Unveils SenseNet Packet Processing, Traffic Management IP
Innovaide Inc. announced the availability of key packet processing and traffic management engines targeting the Carrier Ethernet equipment market. The SenseNet[TM] family of reusable Intellectual Property consists of three hardware blocks – Classification Engine, Forwarding Engine, and Traffic Management Engine. These blocks are available as Verilog implementation for easy mapping into any FPGA and ASIC.
Altos Variety LX Timing Library Models Qualify on UMC 65nm Process
Altos Design Automation Inc. announced that UMC has qualified Altos’ statistical timing model generator, Variety LX on UMC’s 65nm standard cell library. This qualification effort means that designers can use Altos’ Variety LX, UMC’s 65nm process along with UMC’s 65nm standard cell libraries to generate robust library views for statistical analysis and optimization.
Sequence Design to Present Low Power Design Tutorial at DAC
PowerArtist, the latest in a long line of technically advanced power-reduction tools from Sequence Design, takes center stage at this year’s DAC as the company asks, “What color is your RTL?” “It’s a serious question that SoC designers are grappling with,” says Sequence President and CEO Vic Kulkarni. “PowerArtist provides a palette of new RTL power-reduction techniques that lets designers mix, blend and apply just the right touches to create their own masterpiece.”
Workshop for Women in Design Automation Sponsors Students to DAC
The Workshop for Women in Design Automation (WWINDA), part of the 45th Design Automation Conference (DAC), announced that, thanks to generous sponsorship support from companies within the Electronic Design Automation (EDA) community, 12 sponsorships were awarded to graduate students from local universities. These sponsorships cover the cost of travel and workshop registration, and will allow students to attend the 45th annual DAC and participate in the workshop.
MIT Team Wins MEMOCODE Co-Design Contest with Bluespec Synthesis
A five-member team from the Massachusetts Institute of Technology (MIT) won the top honors in the second annual hardware/software co-design contest sponsored by the ACM-IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008). The winning design was completed using the Bluespec general-purpose high-level synthesis environment.