Seminar: Accelerating Silicon Success with Silicon Aware IP
Virage Logic Corporation (NASDAQ:VIRL) and TSMC are offering a free technical lunchinar and demonstration entitled, Accelerating Silicon Success with Silicon Aware IP for Yield Acceleration & Time-to-Volume. The seminar and demonstration will focus on bridging the gap between design and manufacturing and will highlight the STAR(TM) Memory System with the new STAR(TM) Yield Accelerator option for advanced design and process technology challenges. The event will take place on December 11, 2007.
Xilinx SPI-4.2 and SFI-4.1 Solutions
Xilinx Inc. (Nasdaq: XLNX) has developed solutions for the Optical Internetworking Forum (OIF) System Packet Interface (SPI) 4.2 and SerDes Framer Interface (SFI) 4.1 standards, the industry’s highest performance channelized packet interfaces. Xilinx’s solutions are based on Virtex(TM)-5 LXT FPGAs and feature the ML550 hardware verification board, SPI-4.2 LogiCORE(TM) IP, and SFI-4.1 reference design. Verified across multiple FPGA platforms, the solutions accelerate the design cycle of wired networking systems that require OC-192 (10 Gbps), multiple OC-48 (2.5 Gbps) or 10 Gbps Ethernet interfaces, resulting in much faster time-to-market than competing solutions.
SEMI October 2007 Book-to-Bill Ratio
According to Semi, North American manufacturers of semiconductor equipment posted $1.23 billion in orders in October 2007 (three-month average basis) and a book-to-bill ratio of 0.83. A book-to-bill of 0.83 means that $83 worth of orders were received for every $100 of product billed for the month.
Xilinx SpeedWay Workshops
Avnet Electronics Marketing announced a new series of SpeedWay Design Workshops(TM) featuring Xilinx® technology. The workshops are available in locations across the U.S. through March 2008.
IPextreme World 2007
IPextreme recently announced their annual intellectual property (IP) conference. The event will take place Tuesday, December 11, 2007 at the Ambassador Hotel in Hsinchu, Taiwan. This year’s show is titled “IP Fuels the Semiconductor Industry.” The conference will feature semiconductor IP presentations from IPextreme, Freescale, Infineon, NXP Semiconductor, and Texas Instruments. In addition, ChipEstimate will demonstrate their software for planning chips with high IP content.
Webinar: How to Quickly Design a Low-Cost ASIC
NEC and Tensilica are sponsoring a webinar on how to quickly design low-cost custom logic. The webcast will take place on Thursday, December 6th at 11 am Pacific (2:00 pm Eastern). The seminar will focus on designing low-cost ASICs using synthesizable 200-megahertz (MHz) 32-bit controllers.
Selecting the Right Isolation Solution Webcast
Texas Instruments Incorporated (TI) (NYSE: TXN) and Arrow Electronics Inc. is offering a live Analog eLab(TM) Webcast. The event will take place Wednesday, December 12, 2007, at 11:00 a.m. CST (18:00 hrs CET). The webinar is titled “Selecting the Right Isolation Solution.”
IEEE 1588 Clock Synchronization for Lattice FPGA
Today Lattice Semiconductor Corporation (NASDAQ: LSCC) announced the availability of Industrial Ethernet Intellectual Property (IP) from Oregano Systems Design and Consulting. Oregano ported their IEEE 1588 IP core for clock synchronization over Ethernet to the LatticeXP(TM) and LatticeXP2(TM) FPGA families. Oregano’s IP core implements a popular IEEE standard that is used for many Industrial Ethernet applications to ensure that the various nodes in a network have synchronized real time clocks. The solution can be delivered as a standard IP core or Oregano can program it onto a LatticeXP or LatticeXP2 device and deliver it as an Application Specific Standard Product (ASSP).
Q3 2007 Semiconductors Equipment Market
SEMI recently reported that worldwide semiconductor manufacturing equipment billings reached $11.13 billion in the third quarter of 2007. The billings figure is one percent greater than the second quarter of 2007 and about one percent greater than the same quarter a year ago. The data is gathered from more than 150 global equipment companies that provide data on a monthly basis.
Microtronix ViClaro III Video IP Development Kit
Microtronix, with the help of Altera, recently developed the ViClaro III HD Panel Display Interface – Video IP Development Kit. The ViClaro III kit helps high-definition (HD) video display designers build highly integrated, next-generation HD 1080p, 100-/120-Hz frame rate conversion television sets or panel display systems. The ViClaro III kit, which uses the Cyclone III FPGA as its engine, provides a comprehensive engineering design and evaluation platform. With the kit, designers can efficiently develop video-processing IP algorithms to support an array of display applications providing superior picture quality.
Android Developer Challenge
In case you missed it, Google recently announced the Android Developer Challenge. The contest will provide $10 million in prizes for building mobile applications on the Android platform. The Challenge will award cash prizes (ranging from $25,000 to $275,000) to developers whose applications are picked by a panel of judges.
Programmable Solutions India 2007
Xilinx, Inc. (Nasdaq: XLNX) and CG-CoreEl will host Programmable Solutions India 2007 on December 11, 2007 in Bangalore and December 13, 2007 in Hyderabad. The events offer a full-day, complimentary line-up of keynotes, presentations, demonstrations and solution centre exhibits at each location to showcase industry-leading programmable solutions. Attendees will learn about silicon, IP, software, solutions and services from Xilinx and its network of solution providers, including Avnet, Nu Horizons, Agilent Technologies, Mentor Graphics, Wind River, iWave, Synplicity, and Nital.