SNOWBUSH ADC IP Core

Posted by Ken Cheung in IP Core on Monday, October 8, 2007

SNOWBUSH microelectronics' 6-bit, 2.5 GSPS ADC IP core is ideal for the most demanding data-conversion applications. The ADC is compact, low-power, and by utilizing its high bandwidth sample-and-hold front-end, it maintains excellent dynamic performance throughout the full range of input frequencies. The ADC features INL of 0.59 LSB, DNL of 0.51 LSB, and ENOB of 5.2 or greater for sampling clock frequencies up to 2.5 GHz. The ADC occupies a silicon area of 0.43 square millimeters.

The state-of-the-art ADC utilizes automatic calibration of key analog blocks to ensure performance over variations in process, voltage, and temperature. The ADC features on-chip power-supply regulation for robust noise immunity within large digital SOC's. Several power-down modes are provided to minimize power consumption.

More info: SNOWBUSH microelectronics »

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