Avery Design PCI-Xactor for PCI Express Gen2

PCI-Xactor for PCI Express, from Avery Design Systems, provider of industry proven Verification IP for PCI Express and Parallel/Serial ATA, offers comprehensive coverage on the digital logic portion of the PCI–SIG Protocol Checklist. PCI-Xactor for PCI Express 2.0 (Gen2) is for functional verification of PCI Express designs.

The new release fully supports Gen2 including Root Complex, Endpoint, and Switch models, protocol assertions, and compliance tests. Core-level compliance has been enhanced through an innovative application port driver methodology (DUT integration) to maximize controllability and observability. Cross mode verification between different revisions of the standard provides forward and backward compatibility testing. Advanced sequential consistency verification is now supported which utilizes reference models to isolate bugs faster and improve random test result prediction.

The PCI-Xactor for PCI Express Verification Solution is a complete verification solution consisting of Bus Function Model (BFM), SuperMonitor, PCI-SIG compliance checklist assertions, testsuites, and verification frameworks for functional verification of PCI Express components. The PCI-Xactor allows design and verification engineers to quickly and extensively test the entire functionality of their PCI Express compliant devices. Verification frameworks form complete testbench environments for endpoint, root complex, and switch designs.

Key Features

  • Verilog source code format for BFMs and testcases
  • Complete set of fully functional BFMs and testbenches for every PCI Express component: Endpoint, Root Complex, Switch
  • Support for serial, 10-bit symbol, and PIPE interfaces
  • Robust BFM API automates sending TLPs/DLLPs and controlling automatic BFM device response behaviors and link and device state transitions
  • Supports transaction-oriented request-completion and error injection sequences based on address and command type attributes
  • Inject errors and noise at all layers
  • Root Complex provides BIOS enumeration functions to validate OS and PCI2.3 compatibility
  • Test suites include the PCI-SIG-based compliance tests in addition to Avery-based endpoint, root complex, and switch testsuites that target high compliance coverage from their corresponding checklists
  • Test are self-checking, portable, and reusable on most types of designs
  • Sequential consistency checking using design matchpoints
  • SuperMonitor verifies transaction ordering in N-port switch and bridge designs
  • Native programming interfaces for Vera, SystemVerilog, SystemC, VHDL, C/C++

PCI-Xactor for PCI Express Gen2 supports testing compliance of the Gen2 features, including:

  • LTSSM changes supporting speed up/down negotiation and link up/down configuration (Recovery)
  • Polling.Compliance Data Rates and Loopback changes
  • Function Level Reset
  • Completion timeout
  • Access control services

More info: PCI-Xactor Datasheet (pdf) »