The Xenergy(TM) estimator is an energy estimator for both Xtensa(R) configurable processor and Diamond Standard processor users. By using the Xenergy tool to optimize for energy early in the SOC (System On Chip) design cycle, designers can cut processor and local memory energy requirements by up to half by making intelligent design trade-offs. Total energy to complete a task (power dissipated over time taken for the task to complete) can be dramatically reduced by customizing a Tensilica Xtensa processor. Energy improvement from processor customization can range from 2x to 83x.
The new Xenergy energy estimator works by computing a power-consumption estimation per-cycle for each different instruction of an Xtensa configurable processor or Diamond Standard processor. For each user-defined instruction extension in an Xtensa processor, created using Tensilica’s powerful TIE (Tensilica Instruction Extension) language, Xenergy creates an energy estimate for the newly created instruction, including modeling the energy consumed by all locally attached memories that are active for a given instruction. Then, using the instruction profile created by Tensilica’s pipeline accurate instruction set simulator, a detailed energy consumption profile is created for the user’s specific application code.
The Xenergy tool is used during the process of configuring an Xtensa processor. Designers can immediately see the effect on total energy consumption when they add configuration options (multipliers, DSP engines, a floating point unit, and many additional configuration choices) and designer-defined instructions. They can see the effect of different interface options as well as memory subsystem options.
The Xenergy energy estimator is also useful for optimizing software, even on completed chips where the processor â€“ whether it is an Xtensa configurable processor or a Diamond Standard core â€“ cannot be changed. Traditionally, software developers tune their code for performance or code size using Tensilica’s standard profiling tools. Now they can use the Xenergy tool to fine tune their C code to reduce energy dissipation by the processor and its memories. For example, a developer might use the feedback provided by the Xenergy tool to decide to restructure the allocation of data structures in local and main memories to reduce memory and bus accesses, which will lower overall energy expenditures.
Tensilica’s Xenergy tool is available now as part of a Tensilica Software Development Kit license, which includes all software development tools, the instruction set simulator, and the Xtensa Xplorer(TM) design environment. For users of the Diamond Standard series of processors, pricing for the Software Development Kit starts at $1000 per seat per year for a node locked license. For Xtensa processor users, pricing for a Software Development Kit starts at $2000 per seat per year for a floating node tool seat.
More info Tensilica