New on Embedded Star – 2007.04.23

Checking PCIe Switch Performance in an Ethernet Network
Example of a PCI Express host running a Gigabit Ethernet network. A PLX switch is added to the network and the resultant system degradation is tested.

Standard Debug Interface Socket Requirements for OCP-Compliant SoC
The document describes an overall debugging framework as the base of the OCP debug interface.

Choosing PCI Express Packet Payload Size
This white paper gives guidelines to device designers based upon consideration of protocol efficiency and market requirements.

The PCI Data Standard: It’s Everywhere You Want Your Credit Data to Be
Paper deals with validation requirements of the payment card industry’s data security standard (PCI DSS), including administrative and technical elements of the program, and the potential sanctions for failure to comply.

PCI Express Packet Latency Matters
Latency is the delay between starting and completing an action. For a switch, it’s the time between the first bit of a packet on an input pin and the first bit of that packet on an output pin forwarded through the switch.

Choosing Data Loggers for Green Building Projects: Ten Important Considerations
The white paper provides valuable tips on evaluating data logging for green building applications.

FPGA Acceleration in HPC: A Case Study in Financial Analytics
Today’s high performance computing systems based on the cluster computing architecture are falling short of delivering the performance needed in demanding applications. Using an FPGA accelerator module such as the XtremeData XD1000 can boost system performance with fewer nodes, reducing the system’s overall power demands.