Lattice Design Software

Posted by Ken Cheung in FPGA on Wednesday, August 16, 2006

Lattice’s products are supported by their ispLEVER 6.0 software development tool suite and PAC-Designer(TM) software. Supporting the PC, UNIX and LINUX platforms, ispLEVER software allows customers to enter, verify and synthesize a design, perform logic simulation and timing analysis, assign input/output pins, designate critical paths, debug, execute automatic timing-driven place and route tasks, and download a logic and input/output configuration to one of Lattice’s devices. Designed to seamlessly integrate with third-party electronic design automation environments, ispLEVER software provides a front-to-back design flow that leverages a customer’s prior investment in tools offered by Cadence, Mentor Graphics, Synopsys and Synplicity. Here are their design tools:

  • ispLEVER Design Software
    ispLEVER is a complete design environment for all Lattice digital devices. It provides a set of powerful tools for all design tasks, including project management, IP integration, design planning, place and route, in-system logic analysis, and more. ispLEVER is provided on CD-ROM and DVD for Windows, UNIX, or Linux platforms. ispLEVER (Windows) includes industry leading 3rd party tools from Lattice partners Synplicity and Mentor Graphics for synthesis and simulation. ispLEVER also includes ispVM for device programming and PAC-Designer for design of ispClock and ispPAC devices.
  • ispVM System ISP Programming Software
    The ispVM System is included with ispLEVER, and is also available as a stand-alone device programming manager. The ispVM System(TM) is a comprehensive design download package that provides an efficient method of programming ISP devices using JEDEC and Bitstream files generated by Lattice Semiconductor, and other, design tools. This complete device programming tool allows the user to quickly and easily download designs through an ispSTREAM(TM) to devices and includes features that facilitate ispATE(TM), ispTEST(TM), and ispSVF(TM) programming as well as gang-programming with DLxConnect(TM).
  • ORCAstra(TM) FPSC System Bus Control Panel
    The Lattice ORCAstra(TM) software is a PC-based graphical user interface which allows a user to configure the operational mode of a FPGA or FPSC by programming control bits in the on-chip registers. This helps you quickly explore configuration options without going through a lengthy re-compile process or making changes to your board. Configurations created in the GUI can be saved to memory and re-loaded for later use. A macro capability is also available to support script-based configuration and testing. The GUI can also be used to display system status information in real time. Use of the ORCAstra software does not interfere with the programming of the FPGA portion of the FPSC.
  • PAC-Designer
    PAC-Designer is a free downloadable software tool that supports designing with Lattice’s programmable mixed signal devices. PAC-Designer provides powerful and intuitive graphical user interface for implementing power management and clock network designs.

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