The FPGA Advantage(R) integrated design environment from Mentor Graphics delivers a comprehensive FPGA vendor neutral system targeted to support high-complexity design requirements by braiding together the proven capabilities of HDL Designer Series(TM) for design management, creation and documentation, ModelSim(R) for verification, and Precision(TM) Synthesis for advanced device implementation. FPGA Advantage provides the power and capacity necessary for today’s complex FPGA designs. Here are their tools for FPGA design creation, simulation, and synthesis:
Manage, create and analyze complex HDL designs.
- HDL Designer
Design creation/RTL Reuse and management environment for FPGA and ASIC design that incorporates all the features of the following tools and more.
- HDL Author
Aids HDL entry via many graphical, tabular and textual editors, and generates code.
- HDL Detective
Creates graphical representations of source code and automates design documentation.
- Debug Detective
Integrated with ModelSim(R) to provide interactive visualization of designs during simulation.
Simulate complex designs regardless of platform or language.
- ModelSim(R) SE
ModelSim SE is is a UNIX, Linux, and Windows-based simulation environment, combining high performance with the most advanced debugging capabilities in the industry. The tool combines high performance and high capacity with the most advanced code coverage and debugging capabilities in the industry. ModelSim SE offers unmatched flexibility by supporting 32 and 64 bit UNIX and Linux and 32 bit Windows(R)-based platforms.
- ModelSim PE
ModelSim PE is a industry-leading, Windows-based simulator for VHDL, Verilog, or mixed-language simulation environments. ModelSim PE, an entry-level simulator, offers VHDL, Verilog, or mixed-language simulation. Coupled with the most popular HDL debugging capabilities in the industry, ModelSim PE is known for delivering high performance, ease of use, and outstanding product support.
Advanced synthesis for complex FPGA and ASIC designs.
- Precision Synthesis
Complete easy-to-use RTL and physical synthesis environment offers new placement reuse and modular design flows, along with expert-level optimization of challenging FPGA designs in all leading technologies for enhanced designer productivity.
- Precision RTL Synthesis
Intuitive logic synthesis environment with advanced optimization techniques, incremental debug/analysis, and advanced inferencing technology maximizes FPGA architecture independence, accelerates time to market, eliminates design defects and delivers superior quality of results.
Mature, industry-proven synthesis product for designing PLDs, FPGAs and ASICs, in VHDL or Verilog. LeonardoSpectrum combines push-button ease of use with the powerful control and optimization features associated with workstation-based ASIC tools. LeonardoSpectrum allows you to create CPLDs, FPGAs, or ASICs in VHDL or Verilog within one synthesis environment. For design and analysis, set up is a snap, and you won’t find a more flexible tool for design and analysis.