Lattice FPSC
Lattice Semiconductor pioneered the approach of putting ASIC embedded cores and FPGA gates on the same silicon die. They call this a Field Programmable System Chip (FPSC). In contrast to ASICs with embedded FPGA gates, FPSCs have a broad range of uses. The embedded cores hold industry-standard Intellectual Property - bus interface, high-speed line interface, and high-speed transceiver cores. When these embedded cores are combined with hundreds of thousands of programmable gates they can be used in a variety of advanced system designs. Here are their FPSCs:
- ORSPI4
Embedded Core Function: OIF-SPI4-02.0 compliant 10 Gbits/s interfaces; backplane transceivers containing four channels, each operating up to 3.7 Gbits/s; high-speed memory controller. - ORLI10G
Embedded Core Function: OIF standard (OIF 99.102.5) compliant XSBI 10 Gbits/s transmit and 10 Gbits/s receive line interface. - ORT82G5/42G5
Embedded Core Function: Backplane transceivers containing eight (ORT82G5) or four (ORT42G5) channels, each operating at up to 3.7 Gbits/s, with a full-duplex synchronous interface with built-in Clock and Data Recovery (CDR). - ORT8850H/L
Embedded Core Function: Backplane transceivers containing eight channels, each operating at up to 850 Mbits/s (6.8 Gbits/s when all eight channels are used) full duplex synchronous interface with built-in Clock and Data Recovery (CDR). - ORSO82G5/42G5
Embedded Core Function: SONET backplane transceivers containing eight (ORSO82G5) or four (ORSO42G5) channels, each operating at up to 2.7 Gbits/s, with a full-duplex synchronous interface with built-in Clock and Data Recovery (CDR).
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