Verific Design Automation was founded in 1998 by EDA industry veteran Rob Dekker. Prior to founding Verific, Dekker was a Software Developer, Manager, and Director at Exemplar Logic where he was the architect and a primary developer of Leonardo, Exemplar's flagship synthesis product which has sold over 10,000 copies to date. Verific's Board of Directors include Ewald Detjens, founder of Exemplar Logic, and Bob Gardner, who has held president and COO positions at several succesful startups.
Verific Design Automation Inc. develops and sells source code (C++) Verilog, SystemVerilog, and VHDL front-ends (parsers, analyzers, elaborators) as well as a generic hierarchical netlist database for EDA applications.
More Info | Previous Page | Company Search
If you found this page useful, bookmark and share it on: