Aldec
Established in 1984 by founder and CEO Dr. Stanley M. Hyduke, Aldec, Inc. is a self-funded, privately held organization that continues to deliver high quality, performance-driven EDA products. Dr. Hyduke's 42 years in the industry provide him with a unique knowledge and understanding of the trends and technologies that will most benefit hardware engineers. Because of this clear focus, Aldec has evolved into one of the best-known names in design verification.
Since 1997, Aldec has been focused on providing easy-to-use VHDL and Verilog design entry and simulation products to support programmable logic designers; its products were well accepted by customers who were transitioning from schematic-based design to a mixed schematic/HDL environment and pure HDL code.
With the density of FPGA/CPLD devices continuously growing, ASIC designers are beginning to utilize FPGA/CPLDs for prototyping and finished products. Responding to this need, Aldec has added a new line of hardware/software co-verification products utilizing hard and softcore processors to address the market requirements for new verification methodologies.
Aldec's industry-proven, common kernel HDL simulation technology supports all operating systems (Window, Linux and UNIX) for both 32 and 64 bit configurations. In addition to traditional, high-performance HDL support, Aldec also supports SystemC™, SystemVerilog™, Assertions (OVA, SVA and PSL), hardware acceleration and co-verification from a single design platform.
Aldec provides a broad spectrum of HDL verification tools to support every market segment, ranging from entry-level HDL users who target low density FPGAs to users requiring high performance tools for Assertion-based verification designs, as well as hardware-based acceleration and co-verification methodologies to best meet their time to market requirements.
Aldec continues to deliver the highest mixed simulation performance for all market segments.
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