The VxxxPBC - I2O Ready, Willing and Able

I2O (Intelligent I/O) is an architectural framework that utilizes the features of a bus architecture such as PCI to remove the I/O bottleneck that can choke the performance of embedded and desktop systems. In essence, the specification proposes the use of an intermediate processing layer to relieve the host Operating System of device management responsibilities. The result is to free additional processor resources for application management. As an ‘open' standard proposal, I2O does not attempt to restrict the mechanics by which the data transport is implemented. PCI is well suited to the task, and this presentation will show that by building on basic PCI bus constructs, the I2O framework can offer cost effective performance enhancement. This paper explores the implications of I2O for system design. Specific constructs are illustrated in an examination of the Avalanche - an I2O ready add-in board for a PCI host. In this design, I2O support features are implemented in hardware and integrated into the VxxxPBC PCI bus interface from V3 Semiconductor.

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