TASKING Helps Siemens with 32-bit TriCore Architecture Design

Historically the standard procedure for developing a tool set (e.g. C/C++ compiler package) for a particular processor was straightforward. The chip manufacturer supplied the architecture specification to one or more external software companies and wished them good luck. By that time the architecture was frozen and chips were being produced, either in samples or mass volume, feedback from the software companies could no longer be incorporated in the chip design. However, sometimes feedback was used in the next proliferation of the core. The Siemens C167 16-bit microcontroller is a good example of the latter. The C167 has some additional instructions to the C166. Some of these instructions were requested by TASKING as they are very useful in helping C compilers generate improved code for accessing data anywhere in the 16MB address space, yet keep the 16K paged approach. It was probably with this experience in mind that Siemens changed its attitude towards chip design. So, when the TriCore project was started, Siemens decided that software needs had to be considered during the design phase of the architecture and invited a compiler expert from TASKING to join the Siemens architecture design team in San Jose. This article describes the outcome from a software perspective of the TriCore design process.

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