SCI Interconnect Chipset and Adapter

The Cache-Coherent Non-Uniform Memory Access (ccNUMA) architecture provides a new system design for breaking through the bus-based memory bandwidth limitations which have prevented scalability in SMP systems much beyond 16 processors. This paper describes an implementation of the interconnect fabric for building large-scale systems using commodity SMP nodes and the industry-standard ANSI/IEEE Scalable Coherent Interface.

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