Substrate Noise Analysis of Mixed-signal ICs
The availability of nanometer process technologies (0.25µm and below) gives designers the opportunity to integrate multiple system components onto a single chip. This pays dividends in enhanced performance, as well as dramatically-reduced area, power, and overall system cost. However, system-on-a-chip (SoC) design is very challenging, especially when analog and digital components are integrated onto the same chip. Whenever digital circuits switch, they inject noise into the common substrate, and this can easily corrupt sensitive analog signals. As feature sizes decrease and clock frequencies increase, the amount of substrate noise created by digital switching increases dramatically. Consequently, substrate noise is a key cause of inexplicable design failures and poor yields of mixed-signal SoC designs.
View Entire Paper | Previous Page | White Papers Search
If you found this page useful, bookmark and share it on:
Embedded Star Newsletter
Don't have time to visit Embedded Star everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.
If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.
