Scaling PCI Systems to Run Dozens of Processors

Today, PCI has become the universal bus. It is the defacto local I/O bus for PCs and most 32-bit and above systems. Most acknowledge that PCI has also become a system's bus la CompactPCI and PCI/ISA. But PCI can play another role, that of a scalable CPU bus. By combining PCI with switchfabric technology, PCI can serve as a standard base for processor arrays to easily deploy MP processing power.

PCI is a standard. As a standard, it provides easy and inexpensive connectivity plugging into a PCI-type bus is a known, almost commodity technology. But PCI has its own limitations in both drive and throughput. Nonetheless, integrating PCI co nnectivity with switched fabric links and throughput can provide a base for scalable MP systems.

Scalable, deployable processing power is needed now more than ever. Many real-time applications require more processing power than can be provided by a few processors in a desktop computer or in a server. The overall system performance for these mid- to high-end applications requires many processors communicating with high bandwidth to process a continuous flow of data streaming in from sensors or high-speed storage systems. Examples of such applications include medical imaging, communication signal analysis, and industrial inspection.

PCI is a newcomer to such a role. Such application demands have in the past been solved by small- to medium sized VME bus systems. How ever, new demands for plug-and-play, cost-sensitivity, and a desktop-like environment have driven these applications toward industrial PCI systems. Unfortunately, PCI was not designed to handle many processors or many interrelated I/O streams. For PCI-based solutions to work for highend applications, the system architecture must be extended in a way that enables scalability.

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