Radar Processing on the DNA VQ750 Multi-Processor Architecture

Radar systems rely on a wide variety of digital signal processing (DSP) algorithms such as FFTs, linear filters, sliding window integrators, adaptive filters and matrix transposes to detect and track targets as well as form images. Early radar signal processing was performed on single processor mainframes or super-computers. However, the growing demand for processing power outpaced the ability of silicon manufacturers to increase processing speed. This led to the development of multi-processor architectures. For a couple of decades, the Distributed Memory architecture has dominated these multi-processor applications. The early hardware was custom designed boards based on bit-slice processing engines; and then more recently, commercial off the shelf (COTS) hardware that uses programmable processors. When comparing COTS boards that use the same processor, such as the Power PC750 or the emerging Power PC 7400, the data I/O capabilities of the board and its memory architecture are the keys to efficient performance.

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