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Reducing Router Chip-count, Power and Cost by 80%

The bandwidth bottleneck and the cost of eliminating it take on a new meaning as networking vendors face up to designing 10-Gigabit network processing solutions. The challenge is to parse, classify, modify and forward packets at 40 nanoseconds lightning speed. With ever-growing price pressures and processing complexity, vendors need to meet this challenge with reduced cost yet scaleable solutions.

Packet processing and classification are the two main functions of network processing. Normally two chip sets are required, one for processing and a second for classifying. EZchip's patented TOPcore® technology incorporates these two functions on a single chip. Unlike other network processor solutions which require many external classifiers, CAMs and SRAMs, EZchip's network processors based on the TOPcore® technology, eliminate the need for any of these components.

EZchip's NP-1 10-Gigabit network processor requires only four low-power, low-cost DRAM chips that dramatically reduce the total system chip-count, power and cost. Outstanding NP-1 integration slashes the chip-count, power dissipation, complexity and cost of network processing solutions by 80%, while increasing their time in market to support demanding new applications.

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