Prototype Studio: RTL to PSP, Pre-Silicon Prototypes for System-On-Chip Designs

System-on-chip (SoC) designs comprise the fastest-growing segment of the semiconductor industry. New products, from cell phone/PDA combinations to set-top boxes to dashboard electronics, contain one or more SoC devices. Designers of these devices are increasingly turning to pre-silicon prototypes (PSP's) constructed from multiple FPGA devices in order to: avoid expensive design respins, validate designs at near real-time speeds in a real-world operating environment, complete software development prior to silicon availability, and put evaluation units in the hands of their customers early. Constructing a multi-FPGA prototype of an SoC design presents many challenges, including partitioning the monolithic design across multiple FPGA devices, working within the pin constraints of the FPGA's, mapping SoC constructs like gated clocks into structures more appropriate for FPGA's, and debugging with the PSP when bugs are uncovered in the design. Meeting these challenges can be more or less difficult depending on the hardware target chosen for the PSP. Choosing the right target involves trade-offs among cost, speed, form factor, reconfigurability, and PSP development effort. Aptix's Prototype Studio provides a complete RTL to PSP flow, regardless which PSP target hardware is selected.

View Entire Paper | Previous Page | White Papers Search

If you found this page useful, bookmark and share it on: