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Multiprocessor Power PC Board Architectures for Pulse-Doppler Radar

For a couple of decades, the Distributed Memory architecture has dominated multi-processor solutions for radar processing. Early hardware was custom designed boards based on bit-slice processing engines; and then more recently, commercial-off-the-shelf (COTS) hardware that uses programmable processors. The advent of the Power PC as a viable candidate for real-time processing has spawned additional COTS product offerings that do not hold to the traditional Distributed Memory architecture. At first blush, these new architectures fall into the class of Shared Memory architectures. However, closer examination shows that they are actually Dual Memory architectures, taking advantage of the features of both Distributed and Shared Memory approaches.

Boards with four of the same Power PC devices are expected to have nearly the same performance. After all, the processors are the same and run at the same speeds; all the vendors have access to the same memory chip densities and speeds; and, the bus paths are limited by the performance of the memory and processor. However, what this article will show is that, when comparing COTS boards that use the Power PC 7400, differences in memory architectures lead to different numbers of boards for implementing real-time, real world applications.

To make the comparisons more concrete, three commercially available Quad Power PC-based 6U VME architectures are compared for a hypothetical but realistic real-time pulse-Doppler radar application. This example was chosen because it represents common radar processing applications. More broadly, the two-dimensional processing described is prevalent in numerous other radar applications such as SAR and Sea Surveillance as well as EO/IR image processing, sonar, medical imaging and factory automation.

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