Implementing Next-Generation Radiation-Hardened ASICs
Designing deep submicron, multimillion gate ASICs for radiation sensitive environments requires a new approach to the traditional ASIC model. A collaboration between Honeywell and Synopsys combines advanced electronic design automation (EDA) tools and infrastructure with state-of-the-art silicon-on-insulator (SOI) manufacturing to address the requirements of next-generation military and aerospace chips.
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