All successful chip projects rely on the front-end logic design team—not only to create the logic from architectural specifications but also to ensure that it is functionally correct and ready for effective back-end implementation. Without sound logic design, the program can be fraught with problems, delays, and failures. In other words, how a project starts is instrumental in its ultimate success or failure.
Interestingly, today’s logic design flow process and tool technologies are still largely a byproduct of haphazard evolutionary flows offered by the previous generation of front-end technologies used in the marketplace, which have not kept pace with the emerging challenges.
Over the last few years, the ever-growing design complexity and design challenges associated with criticality of power, growing design-verification gap, inefficiencies of the logical-physical iterations, lack of clear implementation test and validation checkpoints, and the unpredictable nature of the ad-hoc iterative design process, have created the need for a fundamental shift in the way design is done.
The result of the mounting challenges in design, coupled with the piecewise evolution of design methods has led to a crisis in the schedule predictability of chip programs. For example, a company in Japan has analyzed project data from five generations of projects in which overall complexity has grown 13 times. The number of tool inter-dependencies and resulting iterations when using an ad-hoc serial approach were creating a situation where the schedule variability was actually greater than the original project schedule itself.
In this paper, we presented a set of targeted solutions for logic design teams aiming at reducing the overall risks associated with front-end logic design and verification while reducing the inherit risks. Mounting data supports the critical need to take action if the resulting schedule predictability crisis is to be averted. Those teams that do make the tough decisions for change will be rewarded with capabilities to make more competitive designs faster and cheaper, with a critical advantage in design process predictability and shipping products to market on time or ahead of time.
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