Design Methodology Issues for Embedding Programmable Logic Cores in System-on-Chip Designs

Embedded programmable logic offers the promise of reducing project schedules by implementing high-risk design blocks so that during chip bringup, designs can be quickly re-programmed and modified without the long, costly process of redesigning new versions of silicon. Embedded programmable logic also enables field upgrades of complex algorithms or of blocks implementing protocols for evolving standards. As process geometries continue to shrink and engineering, mask and prototype silicon costs go up, embedded reprogrammable logic will enable multiple product versions to be built from a single die, leveraging those costs over multiple products.

View Entire Paper | Previous Page | White Papers Search

If you found this page useful, bookmark and share it on: