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Comparing High-Performance Architectures for Real-Time Adaptive Processing

In order to evaluate processing architectures for a general class of adaptive signal processing applications, a framework is needed. A set of equations offer the ability to determine computational loading and data movement requirements. On the basis of these equations, a method can be provided for estimating computational performance of a processor for specific applications. This lets us apply a strategy for compartmentalizing data to minimize data movement between processors during the several stages of adaptive processing.

To make the issues more concrete, we'll compare the computational and data I/O issues of each part of the STAP Benchmark on three general types of architectures: shared memory, distributed, and highly parallel. While the example benchmark focuses on radar beam forming, the framework provided here is applicable for evaluating other fields, such as communications, channel equalization, echo cancellation, seismic deconvolution and active noise control.

Distributed memory is an architecture implemented by companies like Mercury, Sky and CSPI. A dual-memory architeture is represented by companies like CETIA, DNA Computing Solutions and Synergy. A parallel architecture can be found in products by companies like Spectrum Signal Processing and Transtech DSP.

Coherent radar systems that use adaptive signal processing perform the processing on data blocks known as coherent processing intervals (CPIs). Under the Mitre Benchmark, as each CPI is collected, preprocessing is performed to prepare the data for adaptive processing, also called post processing. The preprocessing functions are performed, first on individual received samples and then on the return samples from entire transmitted pulses.

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