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A Memory-Efficient Implementation of the HyperTransport Coupon-Based Flow Control Protocol

This white paper has presented an efficient implementation of the HyperTransport flow control protocol that makes better use of memory resources. With this in mind, further considerations are in order:

• A) The proposed implementation improves memory usage. This can be leveraged to increase the number of accepted packets per given amount of available memory; or given an average number of packets to be accepted, to reduce memory requirements. Notice that since the benefits of this efficient implementation depend on the specific packets mix, we can only base ourselves on “average number of packets.” Notice also that according to the HyperTransport I/O Link Specification Revision 3.0, the minimum amount of buffers that transmitters must be able to track is 15. This should compel us to take into account the round-trip latency for control or data packets and their associated NOP packets in order to fully utilize link bandwidth.
• B) The improved implementation is expected to yield greater benefits in all those cases in which memory space at the receiver end is larger, as the improved protocol technique is based on average packet lengths. Therefore, a larger memory space will allow more packets to be included in the average.
• C) The proposed protocol improvement does not lie within the critical path, and therefore, it is not sensitive to small increments in latency due to non-optimized designs. In fact, as the circuitry proposed in this paper consists of several elementary elements, the same can be scattered to improve the overall silicon layout.

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