Summit Design's Vista IDE Simplifies IP Development and Design Sharing

2/27/2006 - Summit Design, Inc., a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, announced today that VistaTM IDE for SystemC can now easily create and compile executables of SystemC designs based on the OSCI simulation kernel.

Such designs can be created and debugged with Vista, but do not depend on the features of Vista once compiled. These compiled designs can be freely distributed without requiring a Vista license or distribution agreement.

With Vista, intellectual property (IP) distribution and design sharing is simplified. The IP is shipped with the requisite testbenches and executable specifications in a format that requires only the open-source OSCI SystemC kernel for execution.

First introduced in early 2005, today Vista is a proven integrated development environment (IDE) for rapid SystemC-based analysis and debug.

It provides advanced SystemC aware debugging and unique transaction-level analysis.

Vistaís Transaction Sequence ViewerTM (TSV) supplies the user with direct observation of the key attributes of SystemC transaction-level modeling (TLM), such as time, kernel cycles, return value, function attributes, structure and concurrency.

IP Developers are rapidly embracing Vista as a comprehensive IP development and verification environment because it provides the welcome flexibility to generate and distribute SystemC-supported executables without the need for a Vista run-time license.

"Sonics is frequently asked to provide an efficient means by which our customers can utilize SystemC modeling to distribute their SMART Interconnect configurations across geographically split engineering teams," said Phil Casini, Vice President of Marketing and Business Development of Sonics, Inc. "With this new capability, these customers can better leverage Sonicsí OSCI-based SystemC models to support the completion of their architectural exploration activities."

"Increasingly, IP developers are shipping SystemC models to customers to facilitate system-level verification and rapid integration of their IP into designs," said Emil Girczyc, President and CEO of Summit Design, Inc. "Today, IP developers can take advantage of Vistaís advanced development capabilities. Once the IP is fully verified, designers simply set a simple flag in Summitís Vista IDE and recompile to have the IP ready for distribution to customers. For IP users, the only requirement is the industry standard open-source OSCI SystemC simulator."

Vista includes an "-OSCI" option that creates a makefile, compiles, and links the userís SystemC design to the OSCI SystemC simulation kernel.

The resulting OSCI-based executable can be simulated without consuming a Vista license. Design groups are free to distribute this executable to others, both inside their company and out.

While this executable does not require a Vista license, groups that compile the IP must have the OSCI simulation kernel, and the licensing rights to any other IP in the build.

Vista is easing distribution of IP models and the associated validation tests, executable testbenches, specification and demonstrations.

About Summitís Vista IDE
VistaTM is an integrated design environment (IDE) for SystemC that combines both hardware and software concepts to speed design and debug of SystemC applications.

It is easy to adopt, since it builds upon the industry standard gnu tools. It's unique Data Introspection, design exploration and debugging features make for more rapid understanding of designs and the verification process.

Vista also offers advanced coding facilities, browsers, and a verification toolset targeted for high-level SystemC transaction-level modeling (TLM).

Vistaís SystemC Transaction Sequence ViewerTM (TSV) supports effective debug of designs written at the transaction-level, with minimal set-up.

With the TSV, designers can automatically view and debug complex communication protocols and system-level interfaces between blocks.

While other SystemC design environments require time-consuming manual code instrumentation, Vistaís TSV automatically captures the interface method calling sequence and presents the communication protocol transactions in an intuitive tabular format.

The unique debugging capabilities in Vista are possible because of its built-in SystemC awareness and its in-depth understanding of SystemC designs.

About Summit
Summit Design's industry-leading ESL and HDL solutions enable SOC companies to deliver products that meet system-level performance and power targets with dramatically reduced schedule risk. Summit's products address engineering challenges met during the specification and implementation design phases of complex hardware/software systems. System ArchitectTM enables massive increases in design complexity and performance by analyzing architectural tradeoffs to arrive at optimized system specifications.

VistaTM and Visual EliteTM ensure swift, successful design modeling and implementation in SystemC, Verilog, and VHDL. Top electronics companies worldwide, including leaders in the wireless, automotive, and consumer electronics space, have achieved dramatic reductions in design cycle time through their use of Summit's products. Summit Design is headquartered in Los Altos, Calif. with offices throughout the US, Europe, Japan, Israel, and ROA.

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