EVE Debuts ZeBu-UF Next-Generation Hardware-Assisted Verification Platform

9/27/2005 - EVE (Emulation and Verification Engineering) introduced its third-generation hardware-assisted verification platform known as the ZeBu-UF (for ultra fast) Series that has a new architecture for system-on-chip (SoC) verification and software development.

Additionally, EVE announced the first product in this series –– ZeBu-UF2, an ultra-fast emulator that enables simultaneous hardware and embedded software verification.

It is a large-capacity verification platform that shortens time to tapeout, improves product quality and eliminates costly respins, while accelerating software development ahead of silicon.

It leverages the same hardware, models and engineering across the entire design cycle, making it cost effective and affordable for every design team.

This is the first of three emulation systems in the ZeBu-UF Series to be unveiled over the next several months. “The ZeBu-UF Series merges the best features of expensive hardware emulators with low-cost rapid prototyping tools,” says Lauro Rizzatti, Worldwide Marketing Vice President and General Manager of EVE-USA. “It offers capabilities and functionality in one ultra-fast and powerful platform that have previously differentiated emulators from FPGA proto boards.”

About the ZeBu-UF Series
The third-generation of the ZeBu (for Zero Bugs) Series exploits a new, unique architecture based on Virtex-4 field programmable gate arrays (FPGAs) from Xilinx for SoC verification and software development. The ZeBu-UF Series features a one PCI card system, offers fully automated front-end software, comprehensive verification modes for fast testing of hardware, hardware/software integration, and embedded software validation. It includes interactive hardware debugging capabilities for thorough debugging, and it is competitively priced for meeting budget constraints. The ZeBu-UF Series can handle design capacity that ranges from 750,000 to six million application specific integrate circuit (ASIC) logic gates. Its memory capacity extends from 80 to 512 megabytes (MB), and its maximum performance varies from 20 to 200 megahertz (MHz).

Introducing ZeBu-UF2
Through a fully automatic compiler, ZeBu-UF2 maps the design-under-test onto two large Virtex4-LX200 plus 160 megabytes of on-board memory for a nominal capacity of three-million ASIC gates. As in the previous two generations, ZeBu-UF incorporates its pioneering and patented reconfigurable test bench (RTB) to achieve unmatched performance in co-emulation with any kind of software test bench. In co-emulation at transaction level, it can reach 20 megahertz (MHz). Through its RTB, the user can perform memory read and write, register read and write, continuous internal state capture, instantaneous snapshot at maximum speed and state save and restore.

Pricing and Availability
ZeBu-UF2 is shipping now. Pricing for the ZeBu-UF Series starts at $25,000.

About Emulation and Verification Engineering
EVE (Emulation and Verification Engineering) offers the fastest verification and most cycles per dollar by combining the best aspects of traditional emulation and rapid prototyping systems into a single, unified environment for both ASIC and SoC debugging and embedded software validation. Its corporate headquarters is located in Palaiseau, France. Its Headquarters in the Unites States is San Jose, Calif. Email: info@eve-team.com

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