IMEC Opens New Advanced Packaging and Interconnect Center (APIC)

7/12/2005 - IMEC launches its advanced packaging and interconnect center, APIC, which is committed to play a central role in bringing together the different players in the IC food chain around joint research programs for future packaging and system-integration technologies. Focus lies on bridging the 'interconnect gap' between circuit and system, heterogeneous integration of RF-components and thermal management in high-power density devices.

IMEC's advanced packaging and interconnect center gathers a number of competences to tackle the challenges in future technologies for packaging and system integration. APIC offers solutions that are vertically and horizontally elaborated. Vertically in terms of technologies that range from the circuit up to the system level. Horizontally, because each level is supported by experienced teams in design, processing, analysis and reliability.

This broad range of competences within APIC feeds a number of well-defined research programs. All have an IC-centric approach and are driven by the semiconductor technology roadmap and by miniaturization of electronic systems; in particular those needed for ambient intelligence applications.

APIC starts with the launch of two programs 3D-stacked IC (3D-SIC) and 3D systems-on-chip (3D-SoC). The 3D-SIC program is also part of IMEC's Industrial Affiliation Program (IIAP) on "advanced interconnect solutions for future technology nodes". The IIAP aims at finding solutions for interconnect technologies for the 45 and 32nm node and below. Until now, main focus lied on the use of Cu and low-k materials in future scaled interconnect modules.

Based on promising results of a benchmarking study comparing power and performance metrics of scaled and unscaled global Cu/low-k wires, optical interconnects, LC interconnects and 3D-stacked ICs, IMEC decided to include this 3D-SIC research in the advanced-interconnect IIAP.

The 3D-stacked ICs - characterized by short high-density interconnects between stacked chips, at the transistor level - showed several advantages concerning power and performance, and the ability to interconnect chips with divergent process flows. The 3D, Si-through connections are realized during the IC foundry process, between the front-end and back-end of line.

The 3D-SoC program will develop a platform for heterogeneous integration of SoC. 3D-SoCs are systems in which circuit blocks ('tiles') on a die are interconnected to circuit blocks on another die after passivation, without passing through the regular chip I/O pads. Each of these die may be realized using a different technology. This program aims to realize 3D-connections after the Si-foundry process (post-passivation), using wafer-level-packaging (WLP) technologies.

The target dimensions of the through-Si connections are diameters down to approximately 25Ám and pitches down to approximately 50Ám, for wafers thinned down to 200 to 50Ám. The realization of reliable, low-resistance, low-capacitance and low-cost through-wafer interconnects is a major target for the IMEC's 3D-SoC technology development. Special attention is given to through-Si via reliability and RF-through applications.

Within all APIC programs, activities are aimed at prototyping, characterization and reliability testing. Manufacturability and low-cost processing are key elements along the way. Other programs will be defined around heterogeneous integration, wafer-level packaging and thermal management.

APIC currently groups more than 30 partners worldwide including integrated device manufacturers (IDMs), system houses, packaging, assembly and test houses, equipment and material suppliers and fabless companies. The programs are based on IMEC's expertise in joint research and development, which guarantees a professional approach for sharing of costs, risks and talent. Most of the results will be co-owned, although there is room for a limited amount of proprietary results.

About IMEC
IMEC is a world-leading independent research center in nanoelectronics and nanotechnology. Its research focuses on the next generations of chips and systems, and on the enabling technologies for ambient intelligence. IMEC's research bridges the gap between fundamental research at universities and technology development in industry. Its unique balance of processing and system know-how, intellectual property portfolio, state-of-the-art infrastructure and its strong network of companies, universities and research institutes worldwide, position IMEC as a key partner with which to develop and improve technologies for future systems.

IMEC is headquartered in Leuven, Belgium and has representatives in the US, China and Japan. Its staff of more than 1300 people includes over 400 industrial residents and guest researchers. In 2004, its revenues were EUR 159 million. Further information on IMEC can be found at

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