10/25/2005 - Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN) announced the segmentation of its Incisive(R) functional verification platform, including full solutions with tailored and integrated products coupled with methodologies for unique segment needs. The product families add additional support for multiple languages optimized for each specialist, including the most powerful, yet lowest risk, SystemVerilog-based offering. The three-tiered approach provides Cadence customers with optimal solutions tailored to specific levels of verification complexity. The three tiers are:
"Cadence continues to bring new solutions to the table that address the exploding complexities associated with our SoC development," said Ari Cohen, vice president of Engineering, Silverback Systems. "We are excited about how Cadence brings together software- and hardware-based solutions with verification management to bridge block, chip and system levels."
Moshe Gavrielov, executive vice president and general manager of the Cadence Verification Division, said: "As design and verification methodologies have become more complicated with the advent of SoCs and nanometre geometries, the leading-edge electronics companies have had an enormous challenge adopting a large number of verification languages, methodologies and technologies to address their unique problems. Our customers require solutions that are integrated, tailored to their unique project team needs, and coupled with management tools and methodologies that take them from their definition of plan to closure."
"Incisive Enterprise infuses metrics throughout a verification process that is clearly becoming more and more unpredictable," said Dani Ginesi, ASIC/FPGA development director, Flexlight Networks Inc. "Cadence brings a productized methodology that is extremely comprehensive given the expanding scope of our verification activities, well beyond RTL, and supporting the full mix of languages that my engineers require."
Incisive is the second Cadence platform to adopt a segmented approach to delivering customer-targeted solutions. Last month Cadence introduced a tiered range of Encounter(R) digital IC design products scaled to different design complexities. Encounter L products are tailored to address flat designs at 150 nanometres and above with gate counts below 5 million gates, and Encounter XL products address large-scale, high-performance, hierarchical designs over 5 million gates at 130, 90, and 65 nanometres.
Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, printed circuit boards and systems used in consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2004 revenues of approximately $1.2 billion, and has approximately 5,000 employees. The company is headquartered in San Jose, Calif., with sales offices, design centres, and research facilities around the world to serve the global electronics industry.
Cadence, the Cadence logo, Encounter, Palladium, Incisive, and Xtreme are registered trademarks of Cadence Design Systems in the United States and other countries.
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