9/10/2004 - Cadence Design Systems, Inc. (NYSE: CDN) (Nasdaq: CDN) announced that the Cadence® Allegro® system interconnect design platform has been further customized for engineers designing printed circuit boards (PCBs) for advanced chipsets.
The Allegro system interconnect design platform can be used in conjunction with a silicon design-in kit, available from Intel as a drop-in core layout (DCL), for the newly announced Intel® 915 and 925X Express Chipsets. The Intel DCL supports both PCB layout and system-level signal integrity simulation. The DCL for the Intel 915 and 925X Express Chipsets provides working examples of complex chipsets being designed into the system PCB using Cadence Allegro PCB Editor format. The DCL enables OEMs and ODMs to accelerate their design cycle by re-using the proven integration of CPU, chipset and other motherboard components with the Allegro design platform.
"The Allegro platform provides an efficient and flexible methodology for the electronics industry to implement Intel 915 and 925X Express Chipsets," said Brad Griffin, product marketing director, Silicon Design-in, Silicon-Package-Board Group, Cadence Design Systems, Inc. "Anyone wanting their add-in cards communicate effectively with Intel's new chipsets can utilize the Allegro PCI Express topologies and MacroModels as a testing vehicle."
The Allegro system interconnect design platform brings together all of the existing Cadence technologies for IC package and PCB design, including Allegro PCB SI, in an integrated high-speed design and analysis environment for engineers creating complex digital PCB system and IC package designs.
"Intel customers now have a readily available implementation of our newest Pentium® 4 processor-based platforms with the Cadence Allegro system interconnect design platform," said Sunil Kumar, Intel's Director of Chipset and Software Marketing. "Intel 915 and 925X Express Chipset customers can drop the implementation into their own design using the Intel DCL kit with the Cadence Allegro design platform, making the design-in process as seamless as possible."
System level signal integrity analysis enables testing of the Intel chipsets' high-speed signals, including 2.5-gigabit-per-second PCI Express signals that communicate with devices located on add-in cards. These signals can be simulated with Allegro PCB SI behavioral MacroModels, providing accurate results hundreds of times faster than transistor-level SPICE models. This combination of key technologies optimizes and accelerates high-performance, high-density interconnect design for PC motherboard designers and manufacturers.
About the Allegro Platform
Illustrating its new Allegro co-design methodology, Cadence recently introduced a new approach to silicon design-in kits with its PCI Express design chain. In addition to Intel's new chipsets, the design chain also supports the plug-in of silicon design-in kits for specific ICs, including Altera's StratixTM GX FPGA, and the Cadence Services PCI Express Serdes.
The PCI Express design chain for use with the Allegro PCB SI is available for free downloading at www.allegrosi.com.
The 915 and 925X Express Chipsets DCL and plug-in simulation kits are available from Intel under non-disclosure agreement.
Cadence is the world's largest supplier of electronic design technologies and engineering services. Cadence products and services are used to accelerate and manage the design of semiconductors, computer systems, networking equipment, telecommunications equipment, consumer electronics, and other electronics based products. With approximately 4,850 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and trades on both the New York Stock Exchange and Nasdaq under the symbol CDN. More information is available at www.cadence.com.
Cadence, the Cadence logo and Allegro are registered trademarks of Cadence Design Systems.
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